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姓名 萬鴻均(Hung-Chun Wan) 查詢紙本館藏 畢業系所 工業管理研究所在職專班 論文名稱 應用田口方法於共模電感阻抗之最佳化研究
(Using Taguchi method′s experiment to seek the optimal parameter of the impedance in common mode choke)相關論文 檔案 [Endnote RIS 格式] [Bibtex 格式] [相關文章] [文章引用] [完整記錄] [館藏目錄] [檢視] [下載]
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摘要(中) 本論文主要研究在電源產品中共模電感的阻抗優化。共模電感的阻抗是對於電磁雜訊中EMI抑制的重要參數,在不同頻率有不同的阻抗值。本研究使用權重滿足幾個特定頻率中達到最高的阻抗,並使用田口方法中望大特性找出阻抗的最佳化。透過兩次田口實驗,第一次田口實驗考量7因子與14個交互因子並使用?32 (2^31)找出阻抗高的方向並縮小改善範圍,實驗結果顯示鐵芯尺寸,繞線圈數與鐵芯廠商是三個最主要的影響因子。第二次田口實驗則是以不斷改進的概念,在固定第一次實驗的5個因子並作針對2因子(線徑與圈數)再進行參數優化找出最大的阻抗。
依據最佳化實驗結果,優化後的結構其阻抗特性較原本提升了64.5%,在不須額外投入製程設備與成本下,大幅提高了產品的特性。且實驗找出的關鍵因子也減少了工程師試誤的次數與費用,提高公司的獲利。摘要(英) This research focuses on impedance improvement in common mode choke used in power supply. The impedance is the key parameter to inhibit the EMI (Electro Magnetic Interference) noise while it varies through frequency. In order to find the best setup by using Taguchi method LTB (larger the better), we used weights to enlarge some particular frequency bandwidth to make the highest impedance in this research.
We did two-stage Taguchi experiments. For the first stage, we considered 7 factors and 14 Interaction factors by using ?32 (2^31). The result showed that core size, winding turns, and core vendors are the three most important factors that affect impedance performance. For continuous improvement, we fixed 5 factors from the first stage and did experiment with 2 factors (wire turns and wire diameter) to find the optimal setup in the second stage.
The improvement structure has 64.5% better performance than the original one in impedance. Moreover, without investing in additional manufacturing equipment and costs, the EMI inhibit characteristics of the product had highly improved. The key, the impedance, found by this experiment reduced the costs of trial-and-error by engineers and thus increased the profits of the company.關鍵字(中) ★ 田口方法
★ 共模電感
★ 阻抗
★ 電磁干擾關鍵字(英) ★ Taguchi method
★ Common mode choke
★ Impedance
★ EMI論文目次 中文摘要 i
英文摘要 ii
致謝 iii
目錄 iv
圖目錄 vi
表目錄 vii
第一章 緒論 1
1-1 研究背景與動機 1
1-2 問題分析 3
1-3 研究目的 3
1-4 研究範圍與限制 3
1-5 論文架構與流程 3
第二章 文獻探討 5
2-1 EMI (Electro Magnetic Interference)電磁干擾 5
2-2 共模雜訊 (Common Mode Noise) 6
2-3 共模電感 8
2-4 田口方法 10
第三章 因子分析 12
3-1 共模電感結構分析 12
3-2 阻抗因子分析 13
第四章 阻抗最佳化田口設計 17
4-1 實驗計畫法 17
4-2 反應變數(Response)設置 17
4-3 第一次田口實驗 18
4-3-1 因子與水準 18
4-3-2 田口直交表選擇與配置 19
4-3-3 信噪比(S/N ratio)分析 19
4-3-4 第一次田口方法結果 23
4-4 第二段田口設計 23
4-4-1 因子與水準 23
4-4-2 田口直交表選擇與配置 24
4-4-3 信噪比(S/N ratio)分析 24
4-5 最佳化實驗設計 25
4-6 確效試驗 28
4-7 效益分析 28
第五章 結論與後續研究 30
5-1 結論 30
5-2 後續研究 31
參考文獻 32
附錄 34參考文獻 [1] 歐盟(EU) EMC 規章2014/30/EU
http://ec.europa.eu/growth/sectors/electrical-engineering/emc-directive/index_en.htm
[2] 美國聯邦通信委員會(FCC) EMC 規章47 C.F.R. 15
http://www.ecfr.gov/cgi-bin/text-idx?SID=6d50057e39dc176bd8d5e304973f1681&mc=true&node=pt47.1.15&rgn=div5
[3] IEC CISPR 委員會
http://www.iec.ch/emc/iec_emc/iec_emc_players_cispr.htm
[4] Krishna Mainali and Ramesh Oruganti, “Conducted EMI Mitigation Techniques for
Switch-Mode Power Converters: A Survey”, IEEE Transactions on Power Electronics, Volume:25, Issue: 9, page 2344 – 2356, April 2000
[5] Wu Xin, Franki N.K.Poon, C.M.Lee, M.H.Pong “A study of common mode noise in switching power supply from a current balancing viewpoint”, Power Electronics and Drive Systems, 1999. PEDS ′99. Proceedings of the IEEE 1999 International Conference on Volume:2, page 621 – 625, July 1999.
[6] Jin-ho Choi, Majid Madafshar, Kevin Parmenter, “Designing Common-Mode (CM) EMI Noise Cancellation Without Y-Capacitor”, APEC 07 - Twenty-Second Annual IEEE Applied Power Electronics Conference and Exposition, page 936 – 940, Feb. 2007
[7] Lei Xing, Jian Sun “Conducted Common-Mode EMI Reduction by Impedance Balancing”, IEEE Transactions on Power Electronics, VOL. 27, NO. 3, page 1084 – 1089, MARCH 2012.
[8] Satoshi Qgasawara, Hideki Ayano and Hirofumi Akagi, “An active circuit for cancellation of common-mode voltage generated by a PWM inverter”, Power Electronics Specialists Conference, 1997. PESC ′97 Record., 28th Annual IEEE (Volume:2 ), Jun 1997, page 1547 - 1553
[9] Pengju Kong, Fred C. Lee “Transformer structure and its effects on common mode EMI noise in isolated power converters”, Applied Power Electronics Conference and Exposition (APEC), 2010 Twenty-Fifth Annual IEEE, page 1424 – 1429, Feb. 2010
[10] Fu-Yuan Shih, Dan Y. Chen, Yan-Pei Wu, and Yie-Tone Chen, “A Procedure for Designing EMI Filter for AC Line Applications”, IEEE Transactions on Power Electronics, Volume:11, Issue: 1, page 170 – 181, Jan 1996.
[11] Wenhua Tan, Carlos Cuellar, Xavier Margueron, and Nadir Idir “A Common-Mode Choke Using Toroid-EQ Mixed Structure”, IEEE Transactions on Power Electronics,Volume:28, Issue: 1, page 31 – 35, June 2012.
[12] Rixin Lai, Yoann Maillet, Fred Wang, Shuo Wang, Rolando Burgos, and Dushan Boroyevich “An Integrated EMI Choke for Differential-Mode and Common-Mode Noise Suppression”, IEEE Transactions on Power Electronics, Volume:25, Issue: 3, page 539 – 544, August 2009.
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[21] 李輝煌,田口方法:品質設計的原理與實務,高立圖書,2000.指導教授 葉英傑(Ying-Chieh Yeh) 審核日期 2016-7-25 推文 facebook plurk twitter funp google live udn HD myshare reddit netvibes friend youpush delicious baidu 網路書籤 Google bookmarks del.icio.us hemidemi myshare