應用傳輸線型變壓器於C/X頻段之CMOS功率放大器與Ku頻段之GaN功率放大器之研製

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姓名

張凱彥(Kai-Yen Chang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

應用傳輸線型變壓器於C/X頻段之CMOS功率放大器與Ku頻段之GaN功率放大器之研製
(C/X-band CMOS Power Amplifiers and a Ku-band GaN Power Amplifier Using Transmission-Line Transformer Technique)

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摘要(中)

本論文利用tsmcTM 0.18-µm、tsmcTM 90-nm與WIN 0.25-µm GaN製程設計三顆功率放大器，電路設計上選擇操作於C/X頻段與Ku頻段，首先模擬不同製程之電晶體特性，選出最佳之電晶體大小與操作電流密度，結合變壓器形成寬頻匹配，最後量測電路特性以驗證電路設計之結果。
第一顆使用0.18-m CMOS製程於C/X頻帶之寬頻功率放大器，此功率放大器為兩級電路，採用電晶體疊接架構，輸出端使用傳輸線型變壓器，輸入端與級間匹配使用磁耦合變壓器作寬頻匹配，3 dB頻寬為5.1-11.5 GHz，傳輸增益為25.23 dB，飽和輸出功率為24.34 dBm，1-dB 增益壓縮點輸出功率為20.64 dBm，晶片面積為1.78 (1.968 × 0.904) mm2。
第二顆為應用傳輸線型變壓器於C/X頻帶之90-nm CMOS寬頻功率放大器，此電路延續第一顆電路設計，電路為兩級功率放大器設計，輸出端及級間匹配採用傳統型變壓器，輸入端採用傳輸線型變壓器作匹配，3 dB頻寬為5.1-11.2 GHz，傳輸增益為29.1 dB，飽和輸出功率為22.02 dBm，1-dB 增益壓縮點輸出功率為19.64 dBm，晶片面積為1.32 (1.522 × 0.866) mm2。
第三顆為應用0.25-m GaN製程於Ku頻帶之寬頻功率放大器，電路設計採全積體化之兩級共源級電路架構，傳輸線型變壓器運用於輸入端及輸出端以提供寬頻功率匹配，其3 dB頻寬為13-18.2 GHz，傳輸增益為14.71 dB，飽和輸出功率為32.26 dBm，1-dB 增益壓縮點輸出功率為27.6 dBm，晶片面積為3.13 (2.16 × 1.448) mm2。

摘要(英)

The thesis developed three power amplifiers that were designed in tsmcTM 0.18-µm CMOS, tsmcTM 90-nm CMOS and WIN 0.25-µm GaN for both C/X-band and Ku-band operations. Firstly, the transistor characteristics of different processes were simulated to choose best transistor size and current density. The broadband matching performance was realized by using transformer and Guanella-type transmission-line transformers. Finally, the design concepts were verified by measuring various circuit performances, such as s parameters, output power, linearity and digital modulation characteristics.
The first power amplifier was fabricated in tsmcTM 0.18-µm CMOS technology for C/X-band operation. The two-stage power amplifier adopted cascade topology. The broadband performance was achieved by using transmission-line transformer for output matching and magnetic transformer for both input and inter-stage matching networks. The measurement results of the first PA shows a small signal gain of 25.23 dB, the saturated output power (Psat) and the maximum power added efficiency (PAEMAX) are 24.34 dBm and 28.2%, respectively. The performances of the output 1-dB gain compression point (OP1dB) of 20.64 dBm. The chip area is 1.78(1.968×0.904) mm2.
The second circuit was fabricated in tsmcTM 90-nm CMOS technology for C/X-band operation. The circuit design flow follows the previous PA design which uses both transmission-line transformer and magnetic transformers to achieve broadband and low lossmatching. The wideband PA exhibits a peak gain of 29.1 dB, and 3-dB bandwidths from 5.1-11.2 GHz. The measured saturation output power, OP1dB, and maximum PAE are 22.02 dBm, 19.64 dBm, and 23.92%, respectively. The chip size is 1.32 (1.522×0.866) mm2.
The third chip presents a Ku-band monolithic microwave integrated circuit (MMIC) power amplifier in WIN 0.25-µm GaN technology. The broadband performance was achieved by using transmission-line transformer for both input and output matching networks. The amplifier achieves a 3-dB bandwidth from 13 to 18.2 GHz with small signal gain of 14.71 dB. Continuous wave measurements demonstrate a maximum saturated output power of 32.26 dBm and OP1dB of 27.6 dBm, respectively. The chip size is 3.13 (2.16 × 1.448) mm2.

關鍵字(中)

★ 功率放大器
★ 傳輸線型變壓器

關鍵字(英)

★ power amplifier
★ transmission-line transformer

論文目次

摘要 i
Abstract ii
誌謝 iv
目錄 v
圖目錄 vi
表目錄 ix
第一章緒論 1
1-1 研究動機 1
1-2 研究成果 2
1-3 章節簡介 2
第二章應用傳輸線型變壓器之CMOS寬頻功率放大器研製 3
2-1 前言 3
2-2 磁耦合變壓器與傳輸線型變壓器 3
2-2-1 磁耦合變壓器簡介 3
2-2-2 傳輸線型變壓器 7
2-3 研究現況 10
2-4 應用傳輸線型變壓器於C/X頻帶之0.18-mm CMOS寬頻功率放大器 12
2-4-1 應用傳輸線型變壓器之0.18-mm CMOS寬頻功率放大器設計 12
2-4-2 電路模擬與量測結果 21
2-4-3 結果比較與討論 33
2-5 應用傳輸線型變壓器於C/X頻帶之90-nm CMOS寬頻功率放大器 35
2-5-1 應用傳輸線型變壓器之90-nm CMOS寬頻功率放大器設計 35
2-5-2 電路模擬與量測結果 45
2-5-3 結果比較與討論 57
第三章應用傳輸線型變壓器匹配之GaN寬頻功率放大器 62
3-1 研究現況 62
3-2 應用傳輸線型變壓器於Ku頻帶之GaN寬頻功率放大器 64
3-2-1 應用傳輸線型變壓器於Ku頻帶之GaN寬頻功率放大器設計 64
3-2-2 電路模擬與量測結果 71
3-2-3 結果比較與討論 83
第四章結論 86
4-1 結論 86
4-2 未來方向 87
參考文獻 88

參考文獻

[1] A. M. Niknejad, D. Chowdhury and J. Chen, “ Design of CMOS power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 6, pp. 1784-1796, Jun. 2012.
[2] I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Distributed active transformer–a new power-combining and impedance-transformation technique,“ IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 316-331, Jan. 2002.
[3] P. Haldi, D. Chowdhury, P. Reynaert, G. Liu, and A. M. Niknejad, “A 5.8 GHz 1 V linear power amplifier using a novel on-chip transformer power combiner in standard 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1054-1063, May 2008.
[4] K. H. An, O. Lee, H. Kim, D. H. Lee, J. Han, K. S. Yang, Y. Kim, J. J. Chang, W. Woo, C.-H. Lee, H. Kim, and J. Laskar, “Power-combining transformer techniques for fully-integrated CMOS power amplifiers,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1064-1075, May 2008.
[5] J. Kim, W. Kim, H. Jeon, Y. Y. Huang, Y. Yoon, H. Kim, C. H. Lee, K.T. Kornegay, “A fully-integrated high-power linear CMOS power amplifier with a parallel-series combining transformer, ” IEEE J. Solid-State Circuits, of , vol.47, no.3, pp.599-614, Mar. 2012.
[6] P. Haldi, G. Liu and A. M. Niknejad, “CMOS compatible transformer power combiner,” Electron. Lett., vol. 42, no.19, pp. 1091-1092, Sep. 2006.
[7] C. L. Ruthroff, “Some broadband transformers,” Proc. IRE, vol. 47, pp. 1337-1342, Aug. 1959.
[8] G. Guanella, “New method of impedance matching in radio-frequency circuits,” Brown-Boveri Rev., vol. 31, pp. 327-329, Sep. 1944.
[9] H.-K. Chiou, H.-Y. Chung, Y.-C. Hsu, D.-C. Chang, and Y.-Z. Juang, “Broadband and high-efficiency power amplifier that integrates CMOS and IPD technology,” IEEE Trans. Compon., Packag., Manuf. Technol., vol. 3, no. 9, pp. 1489–1497, Sep. 2013.
[10] P.-H. Chen, H.-K. Chiou and Y.-C. Wang, “A K-band 24.1% PAE wideband unilateralized CMOS power amplifier using differential transmission-line transformers in 0.18-mm CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 26, no. 11, pp. 924-926, Nov. 2016.
[11] B.-H. Ku, S.-H. Baek and S. Hong, “A X-band CMOS power amplifier with on-chip transmission line transformer,” IEEE Radio Freq. Integr. Circuits (RFIC) Symp. Dig., pp. 523-526, Jun. 2008.
[12] P.-S. Chi, Z.-M. Tsai, J.-L. Kuo, K.-Y. Lin, and H. Wang, “An X-band, 23.8-dBm fully integrated power amplifier with 25.8% PAE in 0.18-μm CMOS technology,” 40th European Microwave Conference (EuMC), Paris, France, vol. 28-30, pp.1678-1681, Sep. 2010.
[13] H. Wang, C. Sideris, and A. Hajimiri, “A CMOS broadband power amplifier with a transformer-based high-order output matching network,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2709-2722, Dec. 2010.
[14] B.-H. Ku, S.-H. Back, and S. Hong, “A wideband transformer-coupld CMOS power amplifier for X-band multifunction chip,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 6, pp. 1599-1609, Jun. 2011.
[15] S. Park and S. Jeon, “Wideband harmonic-tuned CMOS power amplifier with 19.5 dBm output power and 22.6% PAE over entire X-band,” IEEE Electron. Lett., Vol. 51, no.9, pp.703-705, 2015.
[16] J.-H. Tsai, and J.-W. Wang, “An X-band half-watt CMOS power amplifier using interweaved parallel combining transformer,” IEEE Microw. Wireless Compon. Lett., vol. PP, no. 99, pp. 1-3, 2017.
[17] B. Razavi, Design of analog CMOS integrated circuits, McGraw-Hill, 2001.
[18] T. Yao, M. Q. Gordon, K. K. W. Tang, K. H. K. Yau, M.-T. Yang, P. Schvan, and S. P. Voinigescu, “Algorithmic design of CMOS LNAs and PAs for 60-GHz radio, ” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1044–1057, May 2007.
[19] J. S. Hong, “Couplings of asynchronously tuned coupled microwave resonators,” IEEE Proc. Microwaves, Antenna and Propagation, vol. 147, pp.354-358, Oct. 2000.
[20] Y. S. Noh, Y. H. Choi and I. Yom, “Ku-band GaN HPA MMIC with high-power and high-PAE performances,” IEEE ELECTRONICS LETTERS., Vol. 50 No. 19 pp. 1361–1363, Sep. 2014.
[21] D. Kim, D. H. Lee, S. Sim, L. Jeon and S. Hong, “An X-Band Switchless Bidirectional GaN MMIC Amplifier for Phased Array Systems,” IEEE Microw. Wireless Compon. Lett., Vol. 24, No. 12, Dec., 2014.
[22] R. Quaglia, V. Camarchia, and M. Pirola, “Dual-band GaN MMIC power amplifier for microwave backhaul applications,’’ IEEE Microw. Wireless Compon. Lett., VOL. 24, NO. 6, JUNE 2014.
[23] A. Biondi, S. D’Angelo, F. Scappaviva, D. Resca and V. A. Monaco, “Compact GaN MMIC T/R module front-end for X-band pulsed rader,” in IEEE Eur. Microw. Integr. Circuits Conf. (EuMIC), pp.297-300, 2016.
[24] Y. Yuan, Y. Fan, Z. Chen, Z. Yang and H. Lin, “Ku-band pre-matched broadband GaN power amplifier with over 30 W power,’’ IEEE Electronics Lett., Vol. 52 No. 10 pp. 872–874, May. 2016.
[25] H. Q. Tao, W. Hong, B. Zhang and X. M. Yu, “A Compact 60W X-Band GaN HEMT power amplifier MMIC,” IEEE Microw. Wireless Compon. Lett., Vol. 27, No. 1, January 2017.
[26] P.-C. Huang, Z.-M. Tsai, K.-Y. Lin, H. Wang, “A 17-35 GHz broadband, high efficiency PHEMT power amplifier using synthesized transformer matching technique,” IEEE Trans. Microw. Theory Tech., Vol. 60, No. 1, pp.112-119, Jan. 2012.
[27] Agilent-5988-5411EN, IEEE 802.11 wireless LAN PHY Layer (RF) operation and measurement (AN1380-2).
[28] IEEE Std 802.11™-2009, IEEE Standard 802.11, 2009.
[29] O. Degani et al., “A 1×2 MIMO multi-band CMOS transceiver with an integrated front-end in 90nm CMOS for 802.11a/g/n WLAN applications,” IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2008, pp. 356–619.
[30] A. Afsahi, A. Behzad, V. Magoon, and L. E. Larson, “Linearized dual-band power amplifiers with integrated baluns in 65 nm CMOS for a 2 × 2 802.11n MIMO WLAN SoC,” IEEE J. Solid-State Circuits, vol. 45, no. 5, pp. 955–966, May 2010.
[31] C.-J. Chang, P.-C. Wang, C.-Y. Tsai, C.-L. Li, C.-L. Chang, H.-J. Shih, M.-H. Tsai, W.-S. Wang, K.-U. Chan and Y.-H. Lin, “A CMOS transceiver with internal PA and digital pre-distortion for WLAN 802.11a/b/g/n applications,” IEEE RFIC Symp. Dig., June 2010, pp. 435-438.
[32] E. Kaymaksut and P. Reynaert, “Transformer-based uneven Doherty power amplifier in 90-nm CMOS for WLAN applications,” IEEE J. Solid-State Circuits, vol. 47, no. 7, pp. 1659–1671, May 2012.
[33] B. Francois and P. Reynaert, “A fully integrated transformer-coupled power detector with 5 GHz RF PA for WLAN 802.11ac in 40 nm CMOS,” IEEE J. Solid-State Circuits, vol. 50, no. 5, pp. 1237–1250, May 2015.
[34] R. Winoto et al., “A 2 × 2 WLAN and bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation,” IEEE Int. Solid State Circuits Conf. (ISSCC) Dig. Tech. Papers, pp. 170–171, Jan. 2016.
[35] 廖顯原，「應用於矽基功率放大器之傳輸線變壓器與穿透矽通孔之研究」，國立中央大學，博士論文，民國100年。
[36] 郭晉瑋，「應用傳輸線型變壓器於X/K–Ka/V頻段全積體整合之寬頻互補式金氧半導體功率放大器研製」，國立中央大學，碩士論文，民國102年。
[37] 陳柏勳，「應用於K頻段之單向化全積體整合功率放大器與應用於V頻段之寬頻功率放大器研製」，國立中央大學，碩士論文，民國103年。
[38] 林厚安，「應用傳輸線型變壓器與自適應偏壓於C/X頻段之寬頻互補式金氧半導體功率放大器研製」，國立中央大學，碩士論文，民國104年。
[39] 林佳慧，「應用單向化預失真、傳輸線型變壓器與二元功率結合技術於C/X頻段之寬頻全積體功率放大器之研製」，國立中央大學，碩士論文，民國105年。

指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2017-7-11

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