可於類比仿真器中模擬複雜波動數位濾波器架構的新型配線器

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姓名

潘聖瑩(Pan-Sheng Ying) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

可於類比仿真器中模擬複雜波動數位濾波器架構的新型配線器
(A New Adaptor for WDF-Based Analog Emulator with Complicated Topology)

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摘要(中)

在現今日益成熟發展的製程技術下，混合訊號(Analog/mixed-signal)晶片設計的驗證流程越來越複雜並且消耗大量時間，若是缺少合適的輔助工具很難滿足上市時間的壓力。然而，目前還沒有一個可靠的針對類比或是混合訊號電路的仿真器，可以很完美的解決混合訊號驗證的問題，為了解決這一現況，我們提出一個基於波動數位濾波器的類比電路仿真器，它用入射波以及反射波來表示類比電路的行為，可以準確的將類比的電路轉成數位電路，並通過實現在FPGA板子上，達到相當快的模擬速度。這可以縮短類比電路驗證流程所消耗時間。
儘管波動數位濾波器的方法被證明是一個可以用來仿真類比電路的有效方法，但是如何建構正確的波動數位架構，以匹配不同類型不同結構的複雜電路，仍然是一個問題。本篇論文提出一個新型的配線器模型，用來解決WDF的複雜架構，尤其是電路中的環狀結構。只要在適當的地方加入這種J型的配線器，可以打破電路中環狀結構的限制，使剩下的電路可以適用在一般的二元樹轉換，從而建立正確的波動數位結構。通過對一些類比電路的模擬，我們所提出的方法確實可以在波動數位濾波器的基礎上有效的模擬不同形態的類比電路，即使是複雜的電路結構也沒問題。

摘要(英)

Nowadays, with the development of manufacturing techniques, the verification of analog/mixed-signal (AMS) integrated circuits (ICs) becomes increasingly complicated and time-consuming. It is not easy to meet Time-to-Market pressure without proper assisting tools. However, a feasible emulation solution doesn’t exist to help the verification of AMS circuits. In order to change such condition, we try to develop a reliable emulating process based on the wave digital filter (WDF), which is a fast and accurate method to convert analog circuits into digital circuits. This method tries to represent the circuit characteristics by incident and reflected waves. In other words, it can transform an analog circuit containing continuous signal into equivalent digital circuit containing discrete signal.
Although classical Wave Digital Filter (WDF) theory [1] was proven as a solid approach to emulate analog circuits, how to construct a correct WDF structure to support various circuits with complicated topology is still a problem. In this paper, a new Joined type (J-type) adaptor is proposed to solve the loop issue in WDF structures, which is the bottleneck of emulating complicated analog circuits. By inserting Joined type adaptors at proper circuit nodes to break the loop structure, the remaining WDF structure can still be built by a simple binary tree as in previous papers. As verified with several examples, the proposed approach is indeed a feasible solution to support various circuit types in WDF-based analog emulators.

關鍵字(中)

★ WDF-Based
★ analog
★ emulator
★ topology

關鍵字(英)

論文目次

摘要 i
Abstract ii
致謝 iii
Contents iv
List of Tables viii
Chapter 1 Introduction 1
1-1 Mixed-signal verification 1
1-2 Existing Analog Emulators 2
1-2-1 FPAAs 2
1-2-2 PANDA 4
1-2-3 SPICE2 6
1-3 Motivation 7
1-4 Thesis Organization 10
Chapter 2 Background 11
2-1 Concepts of the Wave Digital Filter 11
2-1-1 Delay-free loop 11
2-1-2 Linear elements modeling 13
2-1-3 Adaptor 16
2-1-4 Nonlinear MOS Model 18
2-2 Topology of WDF Structure 19
2-3 Problem Definition 20
Chapter 3 Proposed J-Type Adaptor 23
3-1 Joined Adaptor 24
3-2 Formula Derivation for J-Type Adaptors 25
3-2-1 J-type Serial Adaptor 25
3-2-2 J-type Parallel adaptor 28
3-3 Modified Construction Flow of WDF Structure 30
3-3-1 Choosing Element 32
3-3-2 Connecting Element 33
3-3-3 Choosing New Node 35
3-4 An Example of Tree Construction 37
Chapter 4 Experimental Results 41
4-1 Experimental Environment 41
4-2 Bridge-T circuit 41
4-3 OPA for Biomedical Applications 43
4-3-1 One-Stage OPA 43
4-3-2 Two-Stage OPA 46
Chapter 5 Conclusion 50
References 51

參考文獻

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指導教授

劉建男

審核日期

2017-7-27

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