使用鐵電積體被動元件製程之磁耦合全通相位偏移器

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姓名

安謙睿(Chien-Jui An) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

使用鐵電積體被動元件製程之磁耦合全通相位偏移器
(Magnetically Coupled All-Pass Phase Shifters Using a Ferroelectric Integrated Passive Device Process)

相關論文

★ 分佈式類比相位偏移器之設計與製作	★ 以可變電容與開關為基礎之可調式匹配網路應用於功率放大器效率之提升
★ 全通網路相位偏移器之設計與製作	★ 使用可調式負載及面積縮放技巧提升功率放大器之效率
★ 應用於無線個人區域網路系統之低雜訊放大器設計與實現	★ 應用於極座標發射機之高效率波包放大器與功率放大器
★ 數位家庭無線資料傳輸系統之壓控振盪器設計與實現	★ 鐵電可變電容之設計與製作
★ 用於功率放大器效率提升之鐵電基可調式匹配網路	★ 基於全通網路之類比式及數位式相位偏移器
★ 使用鐵電可變電容及PIN二極體之頻率可調天線	★ 具鐵電可變電容之積體被動元件製程及其應用於微波相位偏移器之製作
★ 使用磁耦合全通網路之寬頻四位元 CMOS相位偏移器	★ 具矽基板貫孔之鐵電可變電容的製作與量測
★ 矽基板貫孔的製作和量測	★ 使用鐵電可變電容之頻率可調微帶貼片天線

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摘要(中)

相位偏移器為相位陣列天線中不可或缺的一部份；在多數應用中，完整的360°相移量是必須的。在過去，全通網路曾用於相移器的設計中；當全通網路中兩電感間的耦合係數k為正值，可提升相移量。本論文以k為正值之磁耦合全通網路來設計類比式相位偏移器，目標是僅使用兩
我們設計基於磁耦合全通網路的類比式相位偏移器於 2.45 GHz；相移器中所需的可變電容以鐵電可變電容來實現。根據不同耦合電感佈局樣式，分別設計了三種不同的單級類比式相位偏移器及兩種不同的兩級相移器。模擬結果顯示，當鐵電可變電容可調度達2.3時，單級類比式相位偏移器相移量皆可大於180°，植入損耗皆小於6 dB，返回損耗皆大於10 dB；而兩級類比式相位偏移器相移量皆可大於 360°，植入損耗皆小於13 dB，返回損耗皆大於10 dB。
我們使用本實驗室自行發展的鐵電積體被動元件製程來製作相移器。此製程製作於高電阻率矽基板上，具四層金屬、背面金屬及矽基板貫孔；可製作的元件包括鐵電薄膜可變電容、螺旋電感，及矽化鉻薄膜電阻。量測結果顯示，我們成功製作了鐵電薄膜電容、具矽基板貫孔之鐵電薄膜電容、矽化鉻薄膜電阻，及耦合螺旋電感。但由於製程良率過低，未能量測到完整的類比式相位偏移器特性。
本論文設計了基於磁耦合全通網路之高相移量類比式相位偏移器，並以本實驗室發展之鐵電積體被動元件製程來製作之。由於製程良率不佳，僅量測到各別元件特性；未來將須提升製程良率，以成功實現完整電路。

摘要(英)

Phase shifters are essential components in phase arrays. In most applications, full 360° phase shift is necessary. In the past, all-pass networks (APNs) have been used for phase shifter design. When the coupling coefficient k of the two inductors in an APN is positive, the phase shift can be increased. In this thesis, we design analog phase shifter based on magnetically coupled all-pass networks (MCAPNs) with positive k, aiming to achieve full 360° phase shift with only two stages of the magnetically coupled all-pass phase shifters.
The proposed MCAPN-based analog phase shifters are designed to operate at 2.45 GHz. The variable capacitors required in the phase shifters are realized using ferroelectric varactors. Based on different types of layout of the coupled inductors, three different single-stage phase shifters and two different two-stage phase shifters are designed. Simulation results show that, when the ferroelectric varactors exhibit a tunability of 2.3, all single-stage phase shifters are able to provide a full 360° phase shifter with an insertion loss less than 6 dB and return losses greater than 10 dB. Furthermore, both two-stage phase shifters are able to provide a full 360° phase shifter with an insertion loss less than 13 dB and return losses greater than 10 dB.
The proposed phase shifters are fabricated using a ferroelectric integrated passive device (IPD) process developed by our lab. The fab process is done on a high-resistivity silicon substrate and offers four front-side metal layers, backside metal, and through-silicon vias (TSVs). The devices that can be fabricated with this process include ferroelectric thin-film varactor, spiral inductor, and CrSi2 thin-film resistor. Measurement results show that we have successfully fabricated the ferroelectric varactors, the ferroelectric varactors with TSVs, the CrSi2 thin-film resistors, and coupled spiral inductors. However, due to the low yield, no complete phase shifter responses can be measured.
In this work, we design MCAPN-based analog phase shifters with large amount of phase shift, and fabricate them with the ferroelectric IPD process developed by our lab. Due to the low yield, only individual passive devices are measured. In order to successfully realize a complete circuit, the yield still has to be improved in the future.

關鍵字(中)

★ 相位偏移器
★ 鐵電可變電容
★ 全通網路
★ 具磁耦合全通網路

關鍵字(英)

★ Phase shifter
★ Ferroelectric varactor
★ All-pass network
★ Magnetically coupled all pass network

論文目次

國立中央大學 I
摘要 V
Abstract VI
誌謝 VIII
目錄 XI
圖目錄 XIII
表目錄 XVI
第一章緒論 1
1–1 研究動機 1
1–2 文獻回顧[1]–[4] 2
1–3 論文架構 5
第二章理論分析與設計 6
2–1 簡介 6
2–2 全通網路[31] 7
2–3 磁耦合全通網路架構之分析[31] 10
2–4 兩級類比式相位偏移器之設計分析 17
第三章電路製作與量測結果 38
3–1 電路製程與製作 38
3–1–1 Metal1（電容下電極）製作流程 38
3–1–2 鐵電薄膜沉積 41
3–1–3 Metal2（電容上電極）製作流程 42
3–1–4 鐵電薄膜介電層製作流程 44
3–1–5 氮化矽保護層沉積與矽化鉻電阻製作流程 46
3–1–6 氮化矽保護層開洞製作流程 48
3–1–7 Metal3製作流程 50
3–1–8 BCB介電層製作流程 54
3–1–9 Metal4製作流程 57
3–1–10 矽基板貫孔製作流程 62
3–1–11 BCB保護層之開孔 67
3–2 量測結果 70
第四章結論 83
參考文獻 84
附錄 87

參考文獻

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指導教授

傅家相(Jia-Shiang Fu)

審核日期

2018-1-30

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