| 摘要(英) |
Phased arrays are often used in radars. Phase shifters are essential components in a phased array, where the function of a phase shifter is to provide adjustable phase shift to individual antenna elements, thus steering the beam direction for scanning purpose. Besides, in fifth-generation mobile communication, phased arrays also play important roles. In this thesis, 35-GHz 4-bit and 5-bit passive phase shifters are designed by adopting transmission-line-based all-pass network topology and implemented using TSMC 0.18-μm CMOS process.
In Chapter 2, a 4-bit passive phase shifter is designed using transmission-line-based all-pass network. The system impedance is set to be 25 Ω, whereas the characteristic impedance of the transmission lines used in the networks is chosen to be 50 Ω. In the phase shifter, the 22.5°, 45°, and 90° phase-shifting stages all use single-stage transmission-line-based all-pass network, whereas 180° phase-shifting stage is realized by cascading two stages of transmission-line-based all-pass networks with staggered center frequencies for wider phase-shift bandwidth. The phase shifter occupies a chip area of 0.75×0.75 mm2. Simulation results show that, between 33.2 GHz and 40.8 GHz (20.5% bandwidth), the RMS phase error is less than 3°, the amplitude error is within ±1 dB, and the insertion loss is less than 16.9 dB. However, measurement results show that, for all 16 states, the phase shifts are smaller than expected, causing the RMS phase error to increase a lot. The measured RMS phase error exhibits a minimum of 19.2° at 42.1 GHz. The insertion loss is only less than 24.4 dB within Ka band. After re-simulation, it is found that, if the capacitances of the MIM capacitors and parasitic capacitances of the MOSFETs are reduced, the simulation results would fit better to the measurement results.
In Chapter 3, a 5-bit phase shifter is designed by adopting the same transmission-line-based all-pass network topology with the same design procedure, except that the system impedance and the transmission-line characteristic impedance are chosen to be 50 Ω and 70.7 Ω, respectively. Simulation results show that, between 31.8 GHz and 41.7 GHz (26.9% bandwidth), the RMS phase error is less than 3°, the amplitude error is within ±1 dB, and the insertion loss is less than 18.9 dB. However, same as the phase shifter describe in Chapter 2, measurement results of this phase shifter show that the phase shifts for all states all become smaller than expected and the RMS phase error increases a lot. The measured RMS phase error exhibits a minimum of 27.9° at 38.5 GHz. The insertion loss is only less than 26.6 dB within Ka band.
In this thesis, passive digital phase shifters are successfully designed using transmission-line-based all-pass network. However, large discrepancies between the measured and simulated results are observed. Nevertheless, after re-simulations, part of the possible reasons for the large discrepancy has been proposed. |
| 參考文獻 |
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[23] Qorvo TGP2102. Retrieved from https://www.qorvo.com/products/p/TGP2102 |
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