應用於n77頻段之氮化鎵多悌功率放大器暨應用於C頻段之連續F類氮化鎵功率放大器暨應用於C頻段之堆疊式互補式金氧半導體功率放大器之研製

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賴郡廷(Chun-Ting Lai) 查詢紙本館藏

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電機工程學系

論文名稱

應用於n77頻段之氮化鎵多悌功率放大器暨應用於C頻段之連續F類氮化鎵功率放大器暨應用於C頻段之堆疊式互補式金氧半導體功率放大器之研製
(Implementations on n77-band GaN Doherty Power Amplifier, C-band Class F Continuous Mode GaN Power Amplifier and C-band CMOS Stacked Power Amplifier)

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摘要(中)

本論文將介紹三顆應用於第五代行動通訊之功率放大器，其中兩顆為使用穩懋半導體公司WINTM 0.25-μm GaN/SiC製程設計應用於n77頻段之多悌功率放大器以及應用於C頻段之連續F類功率放大器，第三顆為使用tsmcTM 0.18-μm互補式金氧半導體設計應用於C頻段之堆疊式功率放大器。三個晶片皆完成實作與量測，包含散射參數、大訊號量以及使用5G NR FR1調變訊號量測，皆以最適合的偏壓與預失真方式來讓各個電路有最好的電路特性。
第二章將介紹一顆應用於n77頻段之氮化鎵多悌功率放大器，該電路使用變壓器來設計輸出匹配電路來改善多悌負載調變之頻寬較小的問題，而在輸入端採用不等功率分配器來增加功率回退區之功率附加效率。量測結果顯示電路的大訊號頻寬為2.8 GHz至3.6 GHz，比例頻寬為25%，最佳傳輸增益為9.09 dB。在大訊號量測中由於量測的限制，無法提供完整的數據，在量測到的數據顯示頻帶內飽和輸出功率為34.5至35.5 dBm，效率為30至40.2%；而在6-dB功率回退時效率為20.7至22.8%。該晶片之總面積為9 mm2，其中核心部分為5.63 mm2。調變訊號量測顯示在輸入功率為22 dBm時使用DPD加上CFR，可以使放大器的輸出訊號有最好的EVM與輸出功率表現。
第三章將介紹一顆應用於C頻段之連續F類氮化鎵功率放大器，透過挑選偏壓之方式改善其AM-AM之線性度。在輸出匹配上利用三個共振腔達到連續F類之匹配特性，實現寬頻高效率之功率放大器，而輸入方面利用兩個共振腔之帶通濾波器來增加電路在輸入匹配中的頻寬。量測結果顯示電路的大訊號頻寬為4至5.4 GHz，比例頻寬29.8%，最佳傳輸增益為15.02 dB。大訊號量測結果顯示頻帶內飽和輸出功率為36.4至37.8 dBm，效率為21.4至28.06%，而增益壓縮1-dB時之輸出功率為30.4至35 dBm，效率為17至28%，該晶片之總面積為5 mm2。調變訊號量測顯示輸入功率為18 dBm時使用DPD加上CFR，可以使放大器的輸出訊號有最好的EVM與輸出功率表現。
第四章將介紹一顆應用於C頻段之堆疊式互補式金氧半導體功率放大器，此放大器使用一組堆疊式驅動級放大器來推兩組差動之功率級堆疊式放大器。其中輸入匹配，級間匹配與輸出匹配皆使用變壓進行設計來提升電路整體的頻寬。量測結果顯示本電路之大訊號頻寬橫跨n77至n79之頻帶，比例頻寬為51%，最大傳輸增益為17.07 dB。大訊號量測結果顯示頻帶內飽和輸出功率為23.04至24.73 dBm，效率為8至11.42%，而增益壓縮1dB時之輸出功率為20.4至22 dBm，晶片面積為3.685 mm2。調變訊號量測顯示在輸入功率為7 dBm時使用DPD，可以使放大器的輸出訊號有最好的EVM與輸出功率表現。

摘要(英)

This thesis presents three chips for 5th generation communication system applications. Two of them were designed in WINTM 0.25-μm GaN/SiC, the first one is a Doherty power amplifier (DPA) for n77-band apllications, the second one is a continuous class-F power amplifier for C-band applications. The third PA was a stacked power amplifier fabricated in tsmcTM 0.18-μm CMOS for C-band applications. All three chips have been implemented and measured, including scattering parameters, large signal, and 5G NR FR1 modulation signal measurements. The chips were using the optimized bias conditions and pre-distortion methods to make each circuit have the best circuit performances.
Chapter 2 presents an n77-band GaN DPA, by utilizing transformers to its output matching network, it improves the bandwidth of the DPA. To improve the power added efficiency (PAE) at the power back-off (OPBO) operation condition, an unequal power splliter was adapted at the input of the PA. The measurements achieve a peak power gain of 9.09 dB, a bandwidth of 2.8 to 3.6 GHz, a fractional bandwidth (FBW) is 25%. Due to the limit on large signal measuments, the DPA was unable to achive its saturation output power. According to the measured data, the saturation power is 34.5 to 35.5 dBm and the maximun PAE is 30 to 40.2%, the PAE at 6-dB OPBO is 20.7 to 22.8% in the operation band. The chip area is 9 mm2 which core area is 5.63 mm2. The modulaion measurement result shows that the best EVM performance at 22-dBm input power by using DPD and CFR techniques.
Chapter 3 presents a C-band class-F continuous mode GaN PA. By analyzing the large signal transconductance (Gm), the appropriate gate bias was selected to improve AM-AM linearity. To achieve class-F continuous mode operation, three resonators were applied at the output matching network. On the other hand, a band pass filter with two resonators were used at the input matching network for wide band operation. The measurements achieve a peak power gain of 15.02 dB, a bandwidth of 4.0 to 5.4 GHz, and a fractional bandwidth (FBW) of 29.8%. The measured large signal performances show that a saturation power of 36.4 to 37.8 dBm, a maximun PAE of 21.4 to 28%, an output 1-dB compression power of 30.4 to 35 dBm, and a PAE of 17 to 28 %. The chip area is 5 mm2. The modulaion measurement shows that the PA achieves the best EVM at 18-dBm input power by using DPD and CFR techniques.
Chapter 4 presents a C-band CMOS stacked PA which uses a set of stacked driver cell to drive two differential stacked power cell. All of the matching network were designed with transformers to achieve broadband frequency response. The measurements achieve a peak power gain of 17.07 dB, a bandwidth of 3.2 to 5.4 GHz, a fractional bandwidth (FBW) of 51%. The measured large signal performances show that a saturation power of 23.04 to 24.73 dBm, a maximun PAE of 8 to 11.42%, an output 1-dB compression power of 20.4 to 22 dBm. The chip area is 3.685 mm2. Modulaion measurement shows that the PA presents the best EVM at 7-dBm input power by using DPD technique.

關鍵字(中)

★ 功率放大器
★ 多悌功率放大器
★ 連續模式功率放大器
★ 堆疊式功率放大器
★ 第五代行動通訊

關鍵字(英)

★ Power Amplifier
★ Doherty PA
★ Continuous mode PA
★ Stacked PA
★ 5G NR

論文目次

摘要 i
Abstract iii
致謝 v
目錄 vii
圖目錄 ix
表目錄 xv
第一章緒論 1
1-1 研究動機 1
1-2 研究成果 2
1-3 章節簡介 2
第二章多悌功率放大器 3
2-1 多悌功率放大器研究現況 3
2-2 功率放大器操作簡介 4
2-2-1 功率放大器操作簡介 4
2-2-2 增加功率放大器之功率回退效率的方法 8
2-2-3 多悌功率放大器 10
2-3 應用於n77頻段之氮化鎵多悌功率放大器 18
2-3-1 電路架構圖 18
2-3-2 變壓器設計多悌輸出匹配電路 20
2-3-3 輸入匹配與不等功率分配枝幹耦合器 29
2-3-4 電路模擬與量測結果 33
2-3-5 結果比較與討論 49
第三章連續模式功率放大器 52
3-1 連續模式功率放大器研究近況 52
3-2 連續模式功率放大器介紹 53
3-2-1 傳統的B類與F類功率放大器 53
3-2-2 連續模式B類與J類功率放大器 54
3-2-3 連續模式F類功率放大器 57
3-3 應用於C頻段之連續F類氮化鎵功率放大器 59
3-3-1 電路圖架構圖 59
3-3-2 電晶體特性評估 60
3-3-3 輸出匹配設計 65
3-3-4 輸入匹配設計 74
3-3-5 電路模擬與量測結果 80
3-3-6 結果比較與討論 98
第四章堆疊式功率放大器 101
4-1 互補式金氧半導體功率放大器研究近況 101
4-2 堆疊式功率放大器介紹 102
4-2-1 堆疊式功率放大器之架構與原理 102
4-2-2 堆疊式功率放大器與並聯式功率放大器之比較 104
4-2-3 電感性磁耦合共振腔變壓器介紹 105
4-3 應用於C頻段之堆疊式互補式金氧半功率放大器 110
4-3-1 電路架構圖 110
4-3-2 輸出匹配設計 116
4-3-3 級間匹配與輸入匹配設計 121
4-3-4 電路模擬與量測結果 127
4-3-5 結果比較與討論 144
第五章結論 146
5-1 總結 146
5-2 未來方向 147
參考文獻 149

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指導教授

邱煥凱

審核日期

2022-7-28

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