基於加速度計低功耗精確量測步數演算法在穿戴式裝置的實現

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官敬堯(Ching-Yao Kuan) 查詢紙本館藏

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機械工程學系

論文名稱

基於加速度計低功耗精確量測步數演算法在穿戴式裝置的實現
(Low Power Implementation of an Accurate Accelerometer-Based Step Counting Algorithm in Wearable Device)

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摘要(中)

近年來，每日的行走步數普遍被視為自我健康監測的指標，市面上已有許多穿戴式裝置都具計算行走步數的功能，若能開發一種低功耗且精確量測步數的演算法，則能夠減少裝置的充電次數，進而提升裝置的方便程度以及延長其電池壽命。我們以自適性自相關函數計步(Adaptive Autocorrelation Step Counting, APASC)演算法為基礎，分析並最佳化其核心演算法自相關函數的計算量，再簡化此演算法的流程，提出一種低功耗的自適性自相關函數計步(Low Power Adaptive Autocorrelation Step Counting, LPAPASC)演算法，我們對此演算法進行了準確度分析，並在穿戴式裝置上實現之。最終，本研究提出的LPAPASC演算法與APASC演算法相比，在長達22小時的資料測試中，其準確率僅降低0.86%。然而，LPAPASC演算法在穿戴式裝置上的執行所需的耗電量卻比APASC演算法降低了88%。

摘要(英)

In recent years, the number of steps taken per day has generally been regarded as an indicator of self-health monitoring. There are many wearable devices on the market track user′s daily step count. If an algorithm with low power consumption and accurate step measurement can be developed, the charging times of the device can be reduced, thereby improving the convenience of the device and prolonging its battery life. Based on the Adaptive Autocorrelation Step Counting (APASC) algorithm, we analyze and optimize the calculation amount of the autocorrelation function of its core algorithm, then simplify the process of this algorithm, propose Low Power Adaptive Autocorrelation Step Counting (LPAPASC) algorithm and implemented it in wearable device. Finally, compared with the APASC algorithm, the accuracy of the LPAPASC algorithm proposed in this study is only reduced by 0.86% in the 22-hour data test. However, the power consumption required for the execution of the LPAPASC algorithm in wearable device is 88% lower than that of the APASC algorithm.

關鍵字(中)

★ 量測步數
★ 計算時間
★ 自相關函數
★ 穿戴式裝置
★ 功耗

關鍵字(英)

★ step counting
★ computation time
★ autocorrelation function
★ wearable device
★ power consumption

論文目次

中文摘要........................................i
英文摘要.......................................ii
誌謝..........................................iii
目錄...........................................iv
圖目錄.........................................vi
表目錄........................................vii
符號說明.....................................viii
一、緒論........................................1
1-1研究動機...................................1
1-2文獻回顧...................................1
1-3研究目的...................................3
1-4章節結構...................................3
二、自適性自相關函數計步演算法的基礎...............5
2-1自適性自相關函數計步演算法...................5
2-2演算法的工作記憶體.........................10
2-3演算法的計算量分析.........................10
三、低功耗的自適性自相關計步演算法................15
3-1最佳化自相關函數的計算量....................15
3-1-1降低滯後範圍...........................15
3-1-2降低訊號取樣頻率.......................16
3-1-3最佳化前後比較.........................17
3-2最佳化相似度的計算量.......................18
3-3簡化演算法的流程...........................23
3-4最佳化後的演算法流程.......................24
3-5演算法在最佳化前後之準確率分析..............26
四、嵌入式微控制器實驗..........................30
4-1計步演算法執行時間測試.....................30
4-1-1硬體規格..............................30
4-1-2韌體架構..............................31
4-1-3實驗結果..............................31
4-2計步演算法之功耗計算.......................33
五、總結與結論..................................38
5-1總結......................................38
5-2結論......................................39
參考文獻.......................................40

參考文獻

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指導教授

王淵弘(Yung-Hung Wang)

審核日期

2023-8-1

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