用於玻璃基板上低損耗波導之研究

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姓名

曹家豪(Jia-Hao Cao) 查詢紙本館藏

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光電科學與工程學系

論文名稱

用於玻璃基板上低損耗波導之研究
(Study on Low-loss Integrated Waveguides on Glass Substrate)

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至系統瀏覽論文 (2026-8-19以後開放)

摘要(中)

隨著科學技術的發展，光子元件因其獨特的特性，像是高集成度、大規模製造、低功耗和高靈敏度，受到了廣泛關注。這些特性使其在高速計算、通訊和化學/生物傳感等應用中非常適用。在金屬氧化物半導體（CMOS）製造技術的幫助下，光子集成電路（PICs）展示了在光通信、生物化學傳感、微波合成器和非線性光學等多種應用中的潛力，提供了在光子學和光電學領域中的緊湊、集成和可擴展的製造能力。在各種光子技術中，微環形共振腔對於在晶片上實現光學功能發揮重要作用。通過有效地將光從直波導耦合到環型共振腔內，共振腔內在特定頻率下表現出獨特的光學響應，具有增強的腔內功率。這一特性為晶片上的非線性光學鋪平了道路。同時，通過電訊號外部改變共振腔頻率的能力提供了調製和過濾功能。如今，使用不同材料去製造我們的微環形共振腔得到了廣泛的研究，如矽、聚合物、氮化矽（Si3N4）和III-V族材料，而本論文使用聚合物(SU8)及氮化矽來做為波導的材料，甚至將兩者作結合，去比較它們，而從中可以發現聚合物(SU8)比起氮化矽在製作我們的元件時，聚合物(SU8)波導在製作上有較大的靈活性，且只需經過微影製程就可以得到我們想要的結構，達到了省時且省力的優點，但是他的缺點就是無法承受後段的高溫製程，接著是本論文所製作的低限制氮化矽波導，它與現今的CMOS製程有更好的匹配程度，而且由於氮化矽薄膜較薄，可以使光傳遞在品質較好的氧化層中，使其能降傳輸損耗，還能增加耦合效率，不過它需經過蝕刻的製程，容易在過程中遇到像是側壁垂直度較差、表面較為粗糙等問題，所以為了結合上述的優點，我們製作出混合型波導，不僅可以有靈活的設計，且不需經過蝕刻製程，還可達成和低限制氮化矽波導一樣，可以使光能傳遞在品質較好的薄膜中，使其能降傳輸損耗，還能增加耦合效率。最近，光波導進一步作為光學模組集成在同一包裝或芯片中，稱為共同光學封裝（CPO）。與安裝在板上的獨立光學模組不同，CPO提供了更低的能耗和延遲，使下一代數據中心的光通訊和網絡系統更加高效和可擴展。然而，在大多數專注於矽光子的研究中，常見的基板仍然是矽或藍寶石基板（用於III-V族晶體生長）。此外，通常需要在矽基板上沉積厚度超過2 μm的二氧化矽（SiO2）層作為絕緣層，這大大限制了製造過程的靈活性。與傳統的矽基板相比，玻璃基板現在已成為半導體封裝的首選載體基板，特別是在顯示器和便攜設備中。由於與SiO2層具有可比的折射率，玻璃基板本質上防止了波導到基板的大多數核心層的光學洩漏。玻璃基板潛在地提供了光學組件的無縫組裝，實現了光纖到波導的互連、CPO和集成平台內多芯片模塊的創建。然而，由於玻璃基板的加工溫度較低，波導材料受到限制，因此波導損耗仍然較高。

摘要(英)

With the advancement of science and technology, photonic devices have garnered significant attention due to their unique characteristics, such as high integration, large-scale manufacturing, low power consumption, and high sensitivity. These properties make them highly suitable for applications in high-speed computing, communications, and chemical/biological sensing. Leveraging metal-oxide-semiconductor (CMOS) manufacturing technology, photonic integrated circuits (PICs) have shown potential in various applications including optical communications, biochemical sensing, microwave synthesizers, and nonlinear optics, providing compact, integrated, and scalable solutions in photonics and optoelectronics.
Among various photonic technologies, micro-ring resonators play a crucial role in achieving on-chip optical functionality. By efficiently coupling light from a straight waveguide into the ring resonator, these resonators exhibit unique optical responses at specific frequencies with enhanced intracavity power, paving the way for on-chip nonlinear optics. Additionally, the ability to externally modulate the resonator′s frequency through electrical signals offers modulation and filtering capabilities. Currently, extensive research has been conducted on fabricating micro-ring resonators using various materials such as silicon, polymers, silicon nitride (Si3N4), and III-V materials.
This paper focuses on using polymer (SU8) and silicon nitride as waveguide materials, even combining the two for comparison. It was found that polymer (SU8) waveguides offer greater flexibility in device fabrication, requiring only photolithography to achieve the desired structure, saving time and effort. However, they cannot withstand high-temperature post-processing. Conversely, the low-stress silicon nitride waveguides produced in this study are better matched with current CMOS processes. The thinner silicon nitride film allows light to transmit through a higher quality oxide layer, reducing transmission loss and increasing coupling efficiency, although etching processes can lead to issues such as poor sidewall verticality and surface roughness.
To combine these advantages, we have developed hybrid waveguides that offer flexible design without the need for etching, while still enabling light transmission through high-quality thin films, thus reducing transmission loss and increasing coupling efficiency. Recently, photonic waveguides have been further integrated into the same package or chip as optical components, known as co-packaged optics (CPO). Unlike standalone optical components mounted on a board, CPO offers lower energy consumption and latency, making optical communication and network systems for next-generation data centers more efficient and scalable. However, in most silicon photonics research, common substrates remain silicon or sapphire (used for III-V crystal growth). Additionally, a thick silicon dioxide (SiO2) layer, usually over 2 μm, is typically deposited on the silicon substrate as an insulating layer, significantly limiting fabrication process flexibility. Compared to conventional silicon substrates, glass substrates have now become the preferred carrier substrates for semiconductor packaging, especially in displays and portable devices. Due to their comparable refractive index with the SiO2 layer, glass substrates inherently prevent optical leakage from most core layers to the substrate. Glass substrates potentially offer seamless assembly of optical components, enabling fiber-to-waveguide interconnection, CPO, and the creation of multi-chip modules within an integrated platform. However, due to the lower processing temperature of glass substrates, waveguide materials are limited, leading to higher waveguide loss.

關鍵字(中)

★ 玻璃基板
★ 微環形共振腔
★ 聚合物波導

關鍵字(英)

論文目次

摘要 I
Abstract III
致謝 V
目錄 VI
圖目錄 IX
表目錄 XII
第1章緒論 1
1-1 矽光子 1
1-2 微環形共振腔 2
1-3 聚合物及氮化矽波導之材料特性 3
1-4 不同的基板材料 4
1-5 研究動機 5
1-6論文架構 6
第2章玻璃基板上微環形共振腔結構之模擬 8
2-1 模擬工具與原理 8
2-1.1 有限元素法(Finite Element Method, FEM) 8
2-1.2 有限差分本徵模(Finite Difference Eigenmode, FDE) 9
2-2 不同聚合物波導厚度的有效折射率之模擬 9
2-2.1 空氣披覆層波導設計 9
2-2.2 聚甲基丙烯酸甲酯(PMMA)披覆層波導設計 11
2-3 聚合物波導的彎曲損耗之模擬 14
2-4 低限制氮化矽波導的彎曲損耗之模擬 15
2-5低限制氮化矽波導在有無披覆層之模擬 17
2-6混合型波導之有無披覆層之模擬 19
第3章玻璃基板上微環形共振腔之製程 22
3-1 不同種類波導的製程 22
3-1.1 聚合物波導的製程流程 22
3-1.2 氮化矽波導製程流程 23
3-1.3混合型波導製程流程 24
3-2 不同基板之表面粗糙度 25
3-3 不同光阻的塗佈參數 26
3-3.1 Surpass 26
3-3.2聚合物(SU8) 27
3-3.3 聚甲基丙烯酸甲酯(PMMA) 27
3-4 氮化矽薄膜製程 28
3-4.1氮化矽薄膜之表面粗糙度 31
3-5 微影製程步驟 31
3-5.1 晶片準備之光阻塗佈 31
3-5.2 曝光機 35
3-6 蝕刻製程 36
3-6.1 聚合物波導 37
3-6.2 氮化矽波導 39
3-7 披覆層之塗佈 41
3-8 微加熱器之製程 43
第4章玻璃基板上微環形共振腔之量測 48
4-1 品質因子之計算與理論 48
4-2 傳輸頻譜的量測系統 51
4-3 玻璃基板上品質因子之量測 52
4-3.1 聚合物波導之量測 53
4-3.2 低限制氮化矽波導之量測 60
4-3.3 混合型波導之量測 62
第5章結論與未來展望 68
參考文獻 70

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指導教授

王培勳(Pei-Hsun Wang)

審核日期

2024-8-21

推文