使用 90-nm CMOS 與 100-nm GaAs pHEMT 製程之 Q 頻段與 E 頻段低雜訊放大器

以作者查詢圖書館館藏

、以作者查詢臺灣博碩士

、以作者查詢全國書目

、勘誤回報

、線上人數：96

、訪客IP：3.144.90.236

姓名

江易紘(Yi-Hung Chiang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

使用 90-nm CMOS 與 100-nm GaAs pHEMT 製程之 Q 頻段與 E 頻段低雜訊放大器
(Q-band and E-band Low-Noise Amplifiers in 90-nm CMOS and 100-nm GaAs pHEMT Technologies)

相關論文

★ 分佈式類比相位偏移器之設計與製作	★ 以可變電容與開關為基礎之可調式匹配網路應用於功率放大器效率之提升
★ 全通網路相位偏移器之設計與製作	★ 使用可調式負載及面積縮放技巧提升功率放大器之效率
★ 應用於無線個人區域網路系統之低雜訊放大器設計與實現	★ 應用於極座標發射機之高效率波包放大器與功率放大器
★ 數位家庭無線資料傳輸系統之壓控振盪器設計與實現	★ 鐵電可變電容之設計與製作
★ 用於功率放大器效率提升之鐵電基可調式匹配網路	★ 基於全通網路之類比式及數位式相位偏移器
★ 使用鐵電可變電容及PIN二極體之頻率可調天線	★ 具鐵電可變電容之積體被動元件製程及其應用於微波相位偏移器之製作
★ 使用磁耦合全通網路之寬頻四位元 CMOS相位偏移器	★ 具矽基板貫孔之鐵電可變電容的製作與量測
★ 矽基板貫孔的製作和量測	★ 使用鐵電可變電容之頻率可調微帶貼片天線

檔案

[Endnote RIS 格式]

[Bibtex 格式]

[相關文章]

[文章引用]

[完整記錄]

[館藏目錄]

至系統瀏覽論文 (2027-8-7以後開放)

摘要(中)

在本論文中，我們採用了 90-nm CMOS 製程設計了 Q 頻段的低
雜訊放大器，以及使用 WIN 100-nm GaAs pHEMT 製程實現了 E 頻
段的低雜訊放大器。
在第一章中，我們闡述研究動機與背景，由於高資料傳輸率的移
動通訊系統應用需求增加，以及較低頻率商用頻段的飽和，使得毫
米波頻段成為近年來的一個發展重點。 Q 頻段之應用，包括氣象雷
達、第五代行動通訊，以及新興的衛星網際網路，如 Starlink。根據
3GPP 的規範，第五代行動通訊 frequency range 2 （FR2）中的 n260
及 n259 頻段分別為 3740 GHz 及 39.543.5 GHz，如衛星網際網路
的 downlink 就是使用 37.542 GHz，而 uplink 是使用 47.250.2 GHz
及 50.451.4 GHz。E 頻段之應用，包括對等式網路（P2P）7176
GHz 、 8186 GHz 和汽車長距雷達（7677 GHz）與短距雷達（7781
GHz）等應用。低雜訊放大器身為接收鏈第一級放大的元件，在通
訊系統中，接收機的靈敏度取決於整體的雜訊指數（noise gure,
NF），雜訊指數越低代表對抗雜訊的能力越強、對訊號的靈敏度越
高。依據雜訊指數的串接公式（Friis′ formula），後級的雜訊會被前
級的增益所抑制，而低雜訊放大器身為接收端第一級提供訊號放大的
電路，其性能對於整體系統絕對是至關重要。
在第二章中，我們使用 90-nm CMOS 製程設計了一個操作中心
頻率為 40 GHz 的 Q 頻段低雜訊放大器。在傳統的收發機會有一個開
關在前端進行切換 TX mode 與 RX mode，此開關位於 PA 的後端及
LNA 的前端，開關所造成的損耗會對於整體收發機系統會有極大的影
響。為了減少開關所造成的損耗，我們提出將開關融入 LNA 電路之
中。此方法不需要一個額外的開關來控制系統，便可以達成減少整體
系統損耗之目的。在 40 GHz 中心頻率下，該放大器量測結果有 6.46
dB 的增益，且返回損耗均大於 8 dB，在40 GHz 下的單端輸出 NF
為 5.73 dB， IP1dB 約為 −2.5 dBm。量測結果在 32 GHz 附近 on o
ratio 仍然有 18 dB，這代表我們設計的開關在 on o 狀態之間還是有
良好的區隔，有達到此電路設計之目的。
在第三章中，我們使用 WIN 100-nm GaAs pHEMT 製程提出了
一個 Q 頻段二級低雜訊放大器設計，吸收了先前下線的經驗進行優
化。該電路同樣以 40 GHz 為中心頻率。這個設計採用了二級 Cascode
架構，第一級採用 Cascode，第二級則為 Common-Source （CS）。
在 40 GHz 操作頻率下，小信號量測增益為 26.5 dB。雜訊量測範圍
涵蓋 37 至 50 GHz，且 40 GHz 的 NF 為 2.21 dB，IP1dB 達 −18.8
dBm。此電路在 Q 頻段下取得不錯的綜合效能。與 CMOS 和 SiGe
製程相比在 NF 及 gain 上具有優勢，但在功耗上較高。與 GaN 相比
在 NF 和 gain 表現大致相同，在功耗上具有優勢。
在第四章中，我們我們使用 WIN 100-nm GaAs pHEMT 製程設
計了一個適用於 E 頻段的二級低雜訊放大器。該電路第一級為 CS，
第二級為 Cascode。在 80 GHz 操作頻率下，該放大器達到 21.8 dB
的增益。雜訊量測範圍涵蓋 75 至 90 GHz，且 80 GHz 的 NF 為 4.5
dB，IP1dB 達 −18 dBm。此電路在 E 頻段下取得不錯的效能，與其
他製程相比在 gain 上具有優勢， NF 及功率消耗上效能尚可，無明顯
短板。本電路在優化方面仍有相當大的潛力，透過選用較小的穩定電
阻，預估能夠進一步提升性能。
最後，在第五章中，我們總結了本論文所使用 90-nm CMOS 製程
及 WIN 100-nm GaAs pHEMT 製程設計之 Q 頻段與 E 頻段低雜訊放
大器。使用 90-nm CMOS 製程之 Q 頻段低雜訊放大器量測結果在 32
GHz 附近 on o ratio 仍然有 18 dB，這代表我們設計的開關在 on o
狀態之間還是有良好的區隔，有達到此電路設計之目的:為了減少開關
所造成的所耗，將開關融入 LNA 電路之中。使用 WIN 100-nm GaAs
pHEMT 製程之 Q 頻段低雜訊放大器在 40 GHz 頻段下與其他製程
相比在 NF 及 gain 表現上具有優勢或相當。使用 WIN 100-nm GaAs
pHEMT 製程之 E 頻段低雜訊放大器在 80 GHz 頻段下取得不錯的綜
合效能，與其他製程相比在 gain 上具有優勢， NF 及功率消耗上效能
尚可，無明顯短板。

摘要(英)

In this paper, we designed a Q-Band low-noise amplier (LNA)
using a 90-nm CMOS process and realized an E-Band LNA using the WIN 100-nm GaAs pHEMT process.
In Chapter 1, we elaborate on the research motivation and background. With the increasing demand for high-data-rate mobile communication systems and the saturation of Lower-Frequency commercial bands, Millimeter-Wave frequencies have become a focal point of recent developments. Q-Band applications include weather radar, fthgeneration mobile communications, and emerging satellite internet services such as Starlink. According to 3GPP specications , the FifthGeneration mobile communication frequency range 2 (FR2) bands n260
and n259 are 3740 GHz and 39.543.5 GHz, respectively. Satellite internet downlink uses 37.5-42 GHz, while uplink uses 47.250.2 GHz and
50.451.4 GHz. E-Band applications include Point-to-Point networks
(P2P) at 7176 GHz, 81-86 GHz, and automotive Long-Range radar
(7677 GHz) and Short-Range radar (7781 GHz). As the rst stage
of amplication in the receiver chain, the LNA is crucial for communication systems, where the receiver′s sensitivity depends on the overall
noise gure (NF). A lower noise gure indicates better noise immunity
and higher signal sensitivity. According to the Friis′ formula, the noise
of subsequent stages is suppressed by the gain of the preceding stages,
making the LNA′s performance critical for the overall system.
In Chapter 2, we designed a Q-Band LNA with a center frequency of 40 GHz using a 90-nm CMOS process. Traditionally, a transceiver
switch toggles between TX mode and RX mode at the front end. This
switch, located after the PA and before the LNA, can cause signicant
loss aecting the overall transceiver system. To reduce this loss, we
integrated the switch into the LNA circuit. This approach eliminates
the need for an additional switch, thereby reducing the overall system
loss. At a 40 GHz center frequency, the amplier measured a gain of
6.46 dB, with return losses greater than 8 dB. The single-ended output
NF at 40 GHz was 5.73 dB, and the IP1dB was approximately −2.5
dBm. The On-O ratio near 32 GHz remained 18 dB, indicating that
our switch design maintained good isolation between on and o states,
meeting the design objectives.
In Chapter 3, we proposed a Q-Band two-stage LNA design using
the WIN 100-nm GaAs pHEMT process, incorporating previous tapeout experiences for optimization. This circuit also targets a 40 GHz
center frequency, employing a two-stage Cascode architecture: the rst
stage is a Cascode, and the second stage is a Common-Source (CS). At
40 GHz, the small-signal gain was measured at 26.5 dB. Noise gure
measurements covered the 3750 GHz range, with an NF of 2.21 dB
at 40 GHz, and the IP1dB reached −18.8 dBm. This circuit achieved
good overall performance in the Q-Band, showing advantages in NF
and gain compared to CMOS and SiGe processes, though with higher
power consumption. Compared to GaN, it exhibited similar NF and
gain performance but with a power consumption advantage.
In Chapter 4, we designed an E-Band two-stage LNA using the
WIN 100-nm GaAs pHEMT process. The circuit features a CS rst stage
and a Cascode second stage. At an operating frequency of 80 GHz, the
amplier achieved a gain of 21.8 dB. Noise gure measurements covered
the 7590 GHz range, with an NF of 4.5 dB at 80 GHz, and the IP1dB
reached −18 dBm. This circuit demonstrated good performance in the
E-Band, showing a gain advantage compared to other processes, with
satisfactory NF and power consumption performance and no signicant
shortcomings. There remains considerable potential for optimization;
reducing the stabilizing resistor could potentially enhance performance
further.
Finally, in Chapter 5, we summarize the Q-Band and E-Band LNAs
designed using the 90-nm CMOS and WIN 100-nm GaAs pHEMT processes. The Q-Band LNA using the 90-nm CMOS process showed an
On-O ratio of 18 dB near 32 GHz, indicating good isolation between
on and o states, meeting the design objective of integrating the switch
into the LNA to reduce system loss. The Q-Band LNA using the WIN
100-nm GaAs pHEMT process demonstrated advantages or comparable
performance in NF and gain at 40 GHz compared to other processes.
The E-Band LNA using the WIN 100-nm100-nm GaAs pHEMT process
achieved good overall performance at 80 GHz, with a gain advantage,
satisfactory NF, and power consumption, with no signicant shortcomings.

關鍵字(中)

★ 低雜訊放大器
★ Q 頻段
★ E 頻段
★ CMOS
★ GaAs

關鍵字(英)

★ Low-Noise Amplifiers
★ Q-Band
★ E-Band
★ CMOS
★ GaAs

論文目次

摘要. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IV
目錄. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VII
圖目錄 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IX
表目錄 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XIII
第一章緒論 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 研究動機與背景 . . . . . . . . . . . . . . . . . . . . 1
1.2 論文架構 . . . . . . . . . . . . . . . . . . . . . . . . 3
第二章 Q 頻段整合開關之低雜訊放大器 . . . . . . . . . . . . 5
2.1 簡介 . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 電路模擬與量測 . . . . . . . . . . . . . . . . . . . . 6
2.2.1 電路設計 . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.2 模擬結果 . . . . . . . . . . . . . . . . . . . . . . . . 16
2.2.3 量測結果 . . . . . . . . . . . . . . . . . . . . . . . . 25
2.2.4 電路偵錯與重新模擬 . . . . . . . . . . . . . . . . . . 32
2.3 結果與討論 . . . . . . . . . . . . . . . . . . . . . . . 38
第三章 Q 頻段砷化鎵之二級低雜訊放大器. . . . . . . . . . . 41
3.1 簡介 . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.2 電路設計 . . . . . . . . . . . . . . . . . . . . . . . . 42
3.2.1 先前電路偵錯之結果 . . . . . . . . . . . . . . . . . . 42
3.2.2 電晶體尺寸及偏壓選擇 . . . . . . . . . . . . . . . . 47
3.2.3 電路設計 . . . . . . . . . . . . . . . . . . . . . . . . 48
3.3 電路模擬與量測 . . . . . . . . . . . . . . . . . . . . 55
3.3.1 模擬結果 . . . . . . . . . . . . . . . . . . . . . . . . 55
3.3.2 量測結果 . . . . . . . . . . . . . . . . . . . . . . . . 60
3.3.3 電路偵錯與重新模擬 . . . . . . . . . . . . . . . . . . 66
3.4 結果與討論 . . . . . . . . . . . . . . . . . . . . . . . 69
第四章 E 頻段砷化鎵之二級低雜訊放大器. . . . . . . . . . . 71
4.1 簡介 . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.2 電路設計 . . . . . . . . . . . . . . . . . . . . . . . . 72
4.2.1 先前電路偵錯之結果電路偵錯之結果 . . . . . . . . . 72
VII
4.2.2 電路設計 . . . . . . . . . . . . . . . . . . . . . . . . 75
4.3 電路模擬與量測 . . . . . . . . . . . . . . . . . . . . 81
4.3.1 模擬結果 . . . . . . . . . . . . . . . . . . . . . . . . 81
4.3.2 量測結果 . . . . . . . . . . . . . . . . . . . . . . . . 86
4.3.3 電路偵錯與重新模擬 . . . . . . . . . . . . . . . . . . 92
4.4 結果與討論 . . . . . . . . . . . . . . . . . . . . . . . 95
第五章結論 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

參考文獻

[1] R. Dilli, Analysis of 5G wireless systems in FR1 and FR2 frequency
bands, 2nd Int. Conf. Innov. Mech. Ind. Appl. (ICIMIA), pp. 767
772, Mar. 2020.
[2] G. Amendola, L. Boccia, F. Centurelli, P. Chevalier, A. Fonte,
S. Karman, S. Levantino, A. Mazzanti, C. Mustacchio, A. Pallotta, I. Petricli, C. Samori, F. Tesolin, P. Tommasino, A. Traversa,
and A. Triletti, SiGe BiCMOS building blocks for E- and Dband backhauling front-ends, in Europ. Microw. Integr. Circuits
Conf.(EuMIC), 2022, pp. 113116.
[3] N. Ebrahimi, K. Sarabandi, and J. Buckwalter, A 71-76/81-86
GHz, E-band,16-element phased-array transceiver module with image selection architecture for low evm variation, in Radio Freq.
Integr. Circuits Symp. (RFIC), 2020, pp. 9598.
[4] G. Amendola, L. Boccia, F. Centurelli, W. Ciccognani, E. Limiti,
C. Mustacchio, P. Tommasino, and A. Triletti, Characterizationoriented design of E-band variable-gain ampliers in BiCMOS technology, in Microw. Mediterr. Symp. (MMS), 2022, pp. 14.
[5] A. Y.-K. Chen, Y. Baeyens, Y.-K. Chen, and J. Lin, A low-power
linear SiGe BiCMOS low-noise amplier for millimeter-wave active
imaging, IEEE Microw. Wireless Compon. Lett., vol. 20, no. 2, pp.
103105, 2010.
[6] H. Friis, Noise gures of radio receivers, Proceedings of the IRE,
vol. 32, no. 7, pp. 419422, 1944.
[7] M. Ahn, B. S. Kim, C.-H. Lee, and J. Laskar, A high power
CMOS switch using substrate body switching in multistack structure, IEEE Microw. Wireless Compon. Lett., vol. 17, no. 9, pp.
682684, Sep. 2007.
[8] B. Razavi, Design of Analog CMOS Integrated Circuits. McGrawHill, 2001.
[9] M.-C. Yeh, Z.-M. Tsai, R.-C. Liu, K.-Y. Lin, Y.-T. Chang, and
H. Wang, Design and analysis for a miniature CMOS SPDT
switch using body-oating technique to improve power performance, IEEE Trans. Microw. Theory Techn., vol. 54, no. 1, pp.
3139, Jan. 2006.
[10] M. Keshavarz Hedayati, A. Abdipour, R. Sarraf Shirazi,
C. Cetintepe, and R. B. Staszewski, A 33-GHz LNA for 5G wireless systems in 28-nm bulk CMOS, IEEE Trans. Circuits Syst. II
Express Briefs, vol. 65, no. 10, pp. 14601464, 2018.
[11] D. Lee and C. Nguyen, Dual Q/V -band SiGe BiCMOS low noise
ampliers using q-enhanced metamaterial transmission lines, IEEE
Trans. Circuits Syst. II Express Briefs, vol. 68, no. 3, pp. 898902,
2021.
[12] K. Wang and H. Zhang, A 22-to-47 GHz 2-stage LNA with 22.2 dB
peak gain by using coupled l-type interstage matching inductors,
IEEE Trans. Circuits Syst. I: Regul. Pap., vol. 67, no. 12, pp. 4607
4617, 2020.
[13] F. Ellinger, 26-42 GHz SOI CMOS low noise amplier, IEEE J.
of Solid-State Circuits, vol. 39, no. 3, pp. 522528, 2004.
[14] X. Liang, L. Sun, D. Pang, and S. Wu, Design of Ka band low
noise amplier based on 65nm CMOS technology, in 2021 International Applied Computational Electromagnetics Society (ACESChina) Symposium, 2021, pp. 12.
[15] M. Liu, D. Pang, S. Wu, Y. Kuai, and L. Sun, A 3240 GHz
low-noise amplier for Ka-band phased array radar system in 65-
nm CMOS technology, in 2021 13th International Symposium on
Antennas, Propagation and EM Theory (ISAPE), vol. Volume1,
2021, pp. 0103.
[16] H.-C. Yeh and H. Wang, A miniature Q-band CMOS LNA with
quadruple-cascode topology, in 2011 IEEE MTT-S International
Microwave Symposium, 2011, pp. 14.
[17] J.-H. Tsai, W.-C. Chen, T.-P. Wang, T.-W. Huang, and H. Wang,
A miniature Q-band low noise amplier using 0.13-μm CMOS
technology, IEEE Microw. Wireless Compon. Lett., vol. 16, no. 6,
pp. 327329, 2006.
[18] B.-J. Huang, K.-Y. Lin, and H. Wang, Millimeter-wave low power
and miniature CMOS multicascode low-noise ampliers with noise reduction topology, IEEE Trans. Microw. Theory Techn., vol. 57,
no. 12, pp. 30493059, 2009.
[19] B.-J. Huang, H. Wang, and K.-Y. Lin, A miniature Q-band CMOS
LNA with triple-cascode topology, in 2009 IEEE MTT-S International Microwave Symposium Digest, 2009, pp. 677680.
[20] B. Bae, E. Kim, S. Kim, and J. Han, Dual-band CMOS low-noise
amplier employing transformer-based band-switchable load for 5G
NR FR2 applications, IEEE Microw. Wirel. Compon. Lett., vol. 33,
no. 3, pp. 319322, 2023.
[21] S. Chen, R. Zhang, C. Shi, Y. Shi, and Z. Lai, A Q-band CMOS
LNA with common source topology based on algorithmic design
methodologies, in 2014 12th IEEE International Conference on
Solid-State and Integrated Circuit Technology (ICSICT), 2014, pp.
13.
[22] G. Gonzalez, Microwave Transistor Ampliers (2nd ed.): Analysis
and Design. Prentice-Hall, 1996.
[23] L. Gao and G. M. Rebeiz, A 24-43 GHz LNA with 3.1-3.7 dB noise
gure and embedded 3-pole elliptic high-pass response for 5G applications in 22 nm FDSOI, in 2019 IEEE Radio Frequency Integrated
Circuits Symposium (RFIC), 2019, pp. 239242.
[24] Y.-M. Chen, Y. Wang, C.-C. Chiong, and H. Wang, A 21.5-50 Ghz
low noise amplier in 0.15-μm GaAs pHEMT process for radio as
tronomical receiver system, in 2021 IEEE Asia-Pacic Microwave
Conference (APMC), 2021, pp. 79.
[25] L.-J. Huang, Y.-S. Wang, and H. Wang, Design of a compact Qband low noise amplier in 0.15-μm GaAs pHEMT process, in
2023 Asia-Pacic Microwave Conference (APMC), 2023, pp. 16
18.
[26] S. Lee, W. Seo, S. Kim, B. Ko, S. Lee, M.-S. Kim, and J. Kim,
A concurrent 26/48 GHz low-noise amplier with an optimal dualband noise matching method using GaAs 0.15 μm pHEMT, IEEE
Trans. Circuits Syst. II Express Briefs, vol. 71, no. 3, pp. 10961100,
2024.
[27] Y.-H. Yu, W.-H. Hsu, and Y.-J. E. Chen, A Ka-band low noise amplier using forward combining technique, IEEE Microw. Wireless
Compon. Lett., vol. 20, no. 12, pp. 672674, 2010.
[28] L. Yang, L.-A. Yang, T. Rong, Y. Li, Z. Jin, and Y. Hao, Codesign of K a-band integrated GaAs pin diodes limiter and low noise
amplier, IEEE Access, vol. 7, pp. 88 27588 281, 2019.
[29] X. Yan, H. Luo, J. Zhang, S.-P. Gao, and Y. Guo, A 9-to-42-GHz
high-gain low-noise amplier using coupled interstage feedback in
0.15-μm GaAs pHEMT technology, IEEE Trans. Circuits Syst. I:
Regul. Pap., vol. 70, no. 4, pp. 14761488, 2023.
[30] Z. Wang, D. Hou, P. Zhou, H. Li, Z. Li, J. Chen, and W. Hong, A
Ka-Band switchable LNA with 2.4-dB NF employing a varactor
based tunable network, IEEE Microw. Wireless Compon. Lett.,
vol. 31, no. 4, pp. 385388, 2021.
[31] C. Zhao, D. Duan, Y. Xiong, H. Liu, Y. Yu, Y. Wu, and K. Kang, A
K-/Ka-band broadband low-noise amplier based on the multiple
resonant frequency technique, IEEE Trans. Circuits Syst. I: Regul.
Pap., vol. 69, no. 8, pp. 32023211, 2022.
[32] H. Chen, H. Zhu, L. Wu, W. Che, and Q. Xue, A wideband cmos
lna using transformer-based input matching and pole-tuning technique, IEEE Trans. Microw. Theory Techn., vol. 69, no. 7, pp.
33353347, 2021.
[33] R. A. Shaheen, T. Rahkonen, and A. Pärssinen, Millimeter-wave
frequency recongurable low noise ampliers for 5G, IEEE Trans.
Circuits Syst. II Express Briefs, vol. 68, no. 2, pp. 642646, 2021.
[34] Q. Tian and D. Zhao, A Q-band low-noise amplier in 40-nm
CMOS for Q/V-band satellite communications, in 2022 IEEE International Conference on Integrated Circuits, Technologies and
Applications (ICTA), 2022, pp. 2627.
[35] J. Fu, M. G. Bardeh, J. Paramesh, and K. Entesari, A millimeterwave concurrent LNA in 22-nm CMOS FDSOI for 5G applications,
IEEE Trans. Microw. Theory Techn., vol. 71, no. 3, pp. 10311043,
2023.
[36] B.-W. Min and G. M. Rebeiz, ka-band SiGe HBT low phase imbalance dierential 3-bit variable gain LNA, IEEE Microw. Wireless Compon. Lett., vol. 18, no. 4, pp. 272274, 2008.
[37] H. B. Ahn, H.-G. Ji, Y. Choi, S. Lee, D. M. Kang, and J. Han,
2531 GHz GaN-based LNA MMIC employing hybrid-matching
topology for 5G base station applications, IEEE Microw. Wireless
Compon. Lett., vol. 33, no. 1, pp. 4750, 2023.
[38] X. Tong, L. Zhang, P. Zheng, S. Zhang, J. Xu, and R. Wang, An
1856-GHz wideband GaN low-noise amplier with 2.24.4-dB noise
gure, IEEE Microw. Wireless Compon. Lett., vol. 30, no. 12, pp.
11531156, 2020.
[39] A. Bessemoulin, J. Tarazi, M. G. McCulloch, and S. J. Mahon,
0.1-µm GaAs pHEMT W-band low noise amplier MMIC using
coplanar waveguide technology, in Aust. Microw. Symp. (AMS),
2014, pp. 12.
[40] A. Leuther, M. Ohlrogge, L. Czornomaz, T. Merkle, F. Bernhardt,
and A. Tessmann, 80 nm InGaAs MOSFET W-band low noise
amplier, in IEEE MTT-S Int. Microw. Symp. (IMS), 2017, pp.
11331136.
[41] P.-H. Huang, C.-S. Chiu, G.-W. Huang, K.-M. Chen, and L.-K. Wu,
A low-power low-noise W-band LNA in 90-nm CMOS process with
source degeneration technique, IEEE Microw. Wireless Compon.
Lett., vol. 34, no. 1, pp. 6971, 2024.
[42] Y. Wang, T.-Y. Chiu, C.-C. Chien, W.-H. Tsai, and H. Wang,
An E-band high-performance variable gain low noise amplier for wireless communications in 90-nm CMOS process, IEEE Microw.
Wireless Compon. Lett., vol. 32, no. 9, pp. 10951098, 2022.
[43] D. Pan, Z. Duan, S. Chakraborty, L. Sun, and P. Gui, A 6090-GHz
CMOS double-neutralized LNA technology with 6.3-dB NF and 10
dBm P1dB, IEEE Microw. Wireless Compon. Lett., vol. 29, no. 7,
pp. 489491, 2019.
[44] S. Li, T. Chi, D. Jung, T.-Y. Huang, M.-Y. Huang, and H. Wang,
4.2 an E-band high-linearity antenna-LNA front-end with 4.8dB
NF and 2.2 dBm IIP3 exploiting multi-feed on-antenna noisecanceling and gm-boosting, in 2020 IEEE International Solid-State
Circuits Conference - (ISSCC), 2020, pp. 13.
[45] Y. Zhang, Z. Wei, X. Tang, L. Zhang, and F. Huang, A 76.592.6
GHz CMOS LNA using two-port kq-product theory for transformer
design, IEEE Microw. Wireless Compon. Lett., vol. 32, no. 10, pp.
11871190, 2022.
[46] D. Pepe and D. Zito, 32 dB gain 28 nm bulk CMOS W-band LNA,
IEEE Microw. Wireless Compon. Lett., vol. 25, no. 1, pp. 5557,
2015.
[47] L. Qiu, J. Liu, Q. Dong, Z. Lv, K. Zhao, S. Wang, Y.-C. Kuan,
Q. J. Gu, X. Yu, C. Song, and Z. Xu, Ultralow power E-band
low-noise amplier with three-stacked current-sharing amplication
stages in 28-nm CMOS, IEEE Microw. Wireless Compon. Lett.,
vol. 32, no. 6, pp. 732735, 2022.
[48] D. Karaca, M. Varonen, D. Parveg, A. Vahdati, and K. A. I. Halonen, A 53117 GHz LNA in 28-nm FD-SOI CMOS, IEEE Microw.
Wireless Compon. Lett., vol. 27, no. 2, pp. 171173, 2017.
[49] L. Gao, E. Wagner, and G. M. Rebeiz, Design of E- and W-band
low-noise ampliers in 22-nm CMOS FD-SOI, IEEE Trans. Microw. Theory Techn., vol. 68, no. 1, pp. 132143, 2020.
[50] A. Y.-K. Chen, Y. Baeyens, Y.-K. Chen, and J. Lin, A low-power
linear SiGe BiCMOS low-noise amplier for millimeter-wave active
imaging, IEEE Microw. Wireless Compon. Lett., vol. 20, no. 2, pp.
103105, 2010.
[51] E. Vardarli, P. Sakalas, and M. Schröter, A 5.9 mW E-/W-band
SiGe-HBT LNA with 48 Ghz 3-dB bandwidth and 4.5-dB noise
gure, IEEE Microw. Wireless Compon. Lett., vol. 32, no. 12, pp.
14511454, 2022.
[52] K. Smirnova, C. Bohn, M. Kaynak, and A. C. Ulusoy, UltralowPower W-band low-noise amplier design in 130-nm SiGe BiCMOS, IEEE Microw. Wireless Compon. Lett., vol. 33, no. 8, pp.
11711174, 2023.
[53] A. A. Nawaz, J. D. Albrecht, and A. Ça§r Ulusoy, A Ka/V bandswitchable LNA with 2.8/3.4 dB noise gure, IEEE Microw. Wireless Compon. Lett., vol. 29, no. 10, pp. 662664, 2019.
[54] E. Vardarli, P. Sakalas, and M. Schröter, A 5.9 mW E-/W-band
SiGe-HBT LNA with 48 GHz 3-dB bandwidth and 4.5-dB noise
gure, IEEE Microw. Wireless Compon. Lett., vol. 32, no. 12, pp.
14511454, 2022.
[55] X. Tong, P. Zheng, and L. Zhang, Low-noise ampliers using 100-
nm gate length GaN-on-silicon process in W-band, IEEE Microw.
Wireless Compon. Lett., vol. 30, no. 10, pp. 957960, 2020.
[56] K. W. Kobayashi and V. Kumar, A broadband 70110-GHz E-/Wband LNA using a 90-nm t-gate GaN HEMT technology, IEEE
Microw. Wireless Compon. Lett., vol. 31, no. 7, pp. 885888, 2021.
[57] F. Thome, P. Brückner, S. Leone, and R. Quay, A wideband E-
/W-band low-noise amplier MMIC in a 70-nm gate-length GaN
HEMT technology, IEEE Trans. Microw. Theory Techn., vol. 70,
no. 2, pp. 13671376, 2022.

指導教授

傅家相(Jia-Shiang Fu)

審核日期

2024-8-14

推文