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姓名	梁恭豪(Kung-Hao Liang)  查詢紙本館藏	畢業系所	電機工程學系
論文名稱	高線性度低功率金氧半場效電晶體射頻混波器應用於無線通訊系統 (High Linearity and Low-Power RF CMOS Mixers for Wireless Communication)
相關論文	★ 增強型異質結構高速移導率電晶體大信號模型之建立及其在微波放大器之應用 ★ 空乏型暨增強型Metamorphic HEMT之製作與研究 ★ 增強型與空乏型砷化鋁鎵/砷化銦鎵假晶格高電子遷移率電晶體: 元件特性、模型與電路應用 ★ 微波及毫米波切換器及四相位壓控振盪器整合除三 除頻器之研製 ★ 氧化鋁基板上微波功率放大器之研製 ★ 氧化鋁基板上積體化微波降頻器電路之研製 ★ 順序特徵結構設計研究及其應用在特徵模子去耦合與最小特徵值靈敏度 ★ 順序特徵結構設計研究及其應用在最大強健穩定度與最小迴授增益 ★ LDMOS功率電晶體元件設計、特性分析及其模型之建立 ★ CMOS無線通訊接收端模組之設計與實現 ★ 積體化微波被動元件之研製與2.4GHz射頻電路設計 ★ 異質結構高速移導率電晶體模擬、製作與大訊號模型之建立 ★ 氧化鋁基板微波電路積體化之2.4 GHz接收端模組研製 ★ 氧化鋁基板上積體化被動元件及其微波電路設計與研製 ★ 二維至三維微波被動元件與射頻電路之設計與研製 ★ CMOS射頻無線通訊發射端電路設計
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摘要(中)	論文最前面的部份，提出一個疊接形式的雙閘極金氧半場效電晶體模型。此大訊號模型包含了兩個傳統的BSIM3v3做為內部非線性模型，而外部被動網路則是由具有物理意義為基礎的寄生元件所組成。這些位於閘極、源極以及汲極上，所寄生的電阻、電感則是利用量測到的S參數計算萃取出來。所建立的雙閘極元件模型在小訊號S參數以及功率特性上，模擬與量測結果頻率從50 MHz ~ 15 GHz則是相當的吻合。最後並設計了雙閘極2.4 GHz的低雜訊放大器以及混波器用以驗證所提出模型的準確性。此外，論文裡提出了一個新穎的三次轉導相消的方法，並且設計於一個2.4 GHz的射頻混波器上改善電路的線性度。由於基極到源極的偏壓大小可以改變三次轉導鋒值的位置，將兩顆具有正負三次轉導鋒值的電晶體，以並聯的方式連接這樣即可以達到三次轉導相消的結果。元件的量測結果顯示，鄰近頻道功率比以及輸入三次調變失真點都改善了15 dB。在混波器的設計方面，由於轉導級是貢獻混波器非線性特徵的來源，將具有三次轉導補償的元件取代混波器的轉導級做設計即可達到線性度的改善。最後量測結果顯示，鄰近頻道功率比以及輸入三次調變失真點分別改善了10 dB以及15 dB。 論文另一個部份，提出了一個具有6 GHz寬頻低電壓以及低功率操作的降頻混波器架構。並且以標準的0.18微米金氧半場效電晶體製程實現。這個新穎的混波器是利用疊接的架構以及基極端注入的技術，達成低電壓以及低功率的電路特性。此混波器當工作頻率在2.4 GHz時，具有6 dB的電路增益以及單端頻帶雜訊指數15.2 dB，而線性度方面輸入三次調變失真點為0 dBm。此外，電路核心所需的面積只要0.15 × 0.23 mm2。當中頻頻率固定為100 MHz時，量測到的射頻3-dB頻寬可以從0.5 GHz到6 GHz。在最佳的工作電壓0.7 V操作下，電路只需要0.4 mA的電流損耗。如此低電壓以及低功率操作特性，可以與高階製程技術90或是60奈米製程等相互比較。 論文最後一個部份，設計了一個具有高品質係數的主動式電感。在一般常用的疊接式架構上增加了一個回授電阻以及調整增益的電晶體，如此一來主動式電感的品質係數將可以改善增加。此新穎的主動式電感操作在4.3 GHz時具有3.2 nH的電感值以及最大540的品質係數。最後並利用主動式電感設計了一個主動式的帶通濾波器，此濾波器具有很低的傳輸衰減值0.2 dB反射損耗32 dB，並且濾波器中心頻率經由電壓的改變可以從3.45 GHz調整到3.6 GHz。
摘要(英)	This thesis covers the design of low-power high-linearity CMOS mixers. In the first part of this dissertation, a cascode dual-gate CMOS model is presented. The proposed large-signal model consists of two intrinsic conventional BSIM3v3 nonlinear models and the passive network represents the physical-based parasitic components of the device. The extrinsic elements of substrate networks, and the distributed resistances and inductances of gate, source and drain terminals are calculated from the measured S-parameters. Good agreement form 50 MHz to 15 GHz has been obtained between simulation and measurement of small-signal S-parameters and power characteristics. In order to verify the model accuracy, a 2.4 GHz dual-gate LNA and mixer were designed and tested. Moreover, a new third-order transconductance (gm3) cancellation technique is proposed and applied to a 2.4 GHz conventional RF mixer for improving circuit linearity. The bulk-to-source voltage is applied to adjust the peak value position of gm3. The cancellation of gm3 is utilized by a negative peak gm3 transistor combining in parallel with a positive peak gm3 transistor. For a single device, the measured adjacent channel power ratio (ACPR) and third-order intermodulation (IMD3) distortion are both improved over 15 dB. The compensated gm3 device is placed in the input RF gm-stage, thus reducing the principle nonlinearity source of the mixer. From the experiment results, the ACPR and IMD3 of the mixer are improved about 10 dB and 15 dB, respectively. An ultra broadband low-voltage low-power down-conversion mixer using a 0.18-µm standard CMOS process is also presented. The proposed mixer uses a novel cascode topology with a bulk-injection technique to achieve low-voltage and low-power performance. The mixer features a maximum conversion gain of 6 dB at radio frequency (RF) of 2.4 GHz, a single-side band (SSB) noise figure of 15.2 dB, and an input IP3 of 0 dBm. Moreover, the chip area of the mixer core is only 0.15 × 0.23 mm2. The measured 3-dB RF frequency bandwidth is from 0.5 to 6 GHz with an intermediate frequency (IF) of 100 MHz. The optimum dc supply voltage (VDD) can be scaled down to 0.7 V with a 0.4 mA drain current. The supply voltage and dc power of this circuit can be compatible with an advanced 90-nm or 60-nm CMOS technology. In the last part of this dissertation, a high quality-factor active inductor has been demonstrated. By adding a feedback resistance and a regulated gain stage transistor into the conventional cascade-grounded approach, the quality-factor and performance of CMOS active inductor can be improved. This novel active inductor demonstrated a maximum quality-factor of 540 and a 3.2 nH inductance at 4.3 GHz, where the self-resonant frequency was 5.4 GHz. An active CMOS band-pass filter was also fabricated including this tunable high quality factor active inductor, giving an insertion loss of 0.2 dB and a return loss more than 32 dB with a tuning range from 3.45 GHz to 3.6 GHz.
關鍵字(中)	★ 低電壓 ★ 低功率 ★ 線性度 ★ 高頻模型 ★ 無線通訊 ★ 混波器	關鍵字(英)	★ CMOS ★ BSIM ★ wireless communication ★ linearity ★ low-power ★ low-voltage ★ mixer
論文目次	Abstract ........................................................................................................................I Figure captions...........................................................................................................VII Table captions.................................................................................................................X Chapter 1 Introduction .................................................................................................1 1.1 Motivation .........................................................................................................1 1.2 Literature Survey ...............................................................................................3 1.3 Contribution.......................................................................................................4 1.3 Thesis Organization ...........................................................................................6 Chapter 2 Dual-Gate CMOS RF Large-Signal Model...............................................8 2.1 Introduction .......................................................................................................8 2.2 Dual-Gate Model Description and Extraction Methodology ............................9 2.3 Dual-gate Model Prediction Results................................................................19 2.4 Dual-Gate Topology Design Principle.............................................................19 2.5 Circuits Verification and Measurement Results ..............................................26 2.6 Summary..........................................................................................................31 Chapter 3 High Linearity RF CMOS Mixer Design ................................................32 3.1 Introduction......................................................................................................32 3.2 Review of Linearization Techniques ...............................................................33 3.2.1. Transistor-level linearization technique...................................................34 3.2.2 Circuit-level linearization technique ........................................................39 3.3 New Gm3 Cancellation Technique....................................................................44 3.3.1 The measurement IIP3 and ACPR............................................................48 3.4 High Linearity Gilbert-cell Mixer Design.......................................................50 3.4.1 Experimental Results of the High Linear Mixer ......................................51 3.5 Summary..........................................................................................................53 Chapter 4 Low-voltage Low-power RF Mixer Design .............................................54 4.1 Introduction .....................................................................................................54 4.2 Mixer Fundamentals........................................................................................55 4.3 Microwave Gilbert-Cell mixer ........................................................................57 4.4 Bulk-injection Mixer .......................................................................................61 4.4.1 Circuit Design and Methodology .............................................................61 4.4.2 Experimental Results of Bulk-injection Mixer.........................................64 4.5 Cascode with Bulk-injection Mixer.................................................................66 4.5.1 Mixer core and Operation Principle .........................................................67 4.5.2 Mixer Structure and Performance Analysis..............................................70 4.5.3 Experimental Results of the Novel Cascode Mixer..................................80 4.6 Summary..........................................................................................................83 Chapter 5 CMOS RF Active Inductors Apply to Tunable Active Filter.................85 5.1 Introduction .....................................................................................................85 5.2 Basic Concepts of Active Inductor Architectures............................................86 5.3 A Novel High Quality-Factor Active Inductor Design ....................................93 5.3.1 Circuit Architecture and Design Principle................................................93 5.3.2 Characteristics of the Fabricated CMOS Active Inductor ........................97 5.4 Tunable Active Band –Pass Filter Design .......................................................99 5.5 Summary........................................................................................................103 Chapter 6 Conclusions ..............................................................................................104 References...................................................................................................................106 Publication List..........................................................................................................120
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指導教授	詹益仁、張鴻埜 (Yi-Jen Chan、Hong-Yeh Chang)	審核日期	2008-9-15
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