| 摘要(英) |
This thesis describes several radio frequency circuit designs, which are adopted in W-CDMA application. They are implemented with tsmc 0.35mm SiGe BiCMOS process. The following sections will summarize the practical measured results classified by different circuits in different chapters.
Chapter 3 introduces the designs of up-conversion mixers, including current-folded up-conversion mixer, and double-balanced base up-conversion mixer. These circuits are measured on FR4 print circuit boards. The former has conversion gain of 0.9dB, output P1dB of -9dBm, output IP3 of 3dBm, and isolation between each two ports, which is superior to 40dB. The latter has conversion loss of 3.9dB, output P1dB of –14dBm, output IP3 of 0dBm, and isolation among all ports are superior to 30dB.
Chapter 4 presents the designs of VCOs whose center frequencies are 1.94GHz, including a switched capacitance array VCO, and a quasi-constant KVCO VCO. These circuits are measured on FR4 print circuit boards. The former obtains a tuning range of 351MHz, and output power of -9dBm, and phase noise of –93.7dBc/Hz at 100KHz offset. The latter yields a tuning range of 137MHz, average KVCO of 41MHz/V, and output power of -7dBm, and phase noise of -93dBc/Hz at 100KHz offset. |
| 參考文獻 |
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