無線收發機前端電路與相關被動元件
之研製

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姓名

杜信龍(Hsin-Lung Tu) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

無線收發機前端電路與相關被動元件之研製
(The Study on Wireless Transceiver Front-end Circuits and Related Passive Devices )

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摘要(中)

摘要
本論文主題在於討論以矽製程實現無線收發機之前端電路，如低雜訊放大器，混波器和壓控振盪器，及電路中所需之被動元件之模型化，如電感，變壓器和接觸墊。在被動元件方面，採用了台積電0.35-μm製程，以電感做一系列的研讀及分析，以求得到更高的品質因子。在電路方面，採用了台積電和聯電0.18-μm互補金屬氧化半導體製程實現。而最後我們也利用之前所建立電感的資料庫，去設計操作在C-頻帶之壓控振盪器。以下依各章節不同的電路來分類，及概述論文中各電路的實際量測結果。
第二章為一些被動元件之研討，包恬了電感，變壓器，傳輸線及接觸墊。電感最重要的參數為自振頻率，品質因子及面積。在此多種增強品質因子的方法也被討論，如使用差動性電感，圖形式接地屏蔽電感和格狀深溝槽屏蔽電感。另外堆壘性電感也減少面積也被討論。而四種材質來實現圖形式接地屏蔽，分別是Nwell, Poly, (N+ diffusion)和metal，從量測得知以Poly為材質的圖形式接地屏蔽有較好的效果。
第三章為低雜訊放大器與寬頻放大器的探討，一開始介紹低雜訊放大器的架構及一些寬頻的技巧。也簡單地分析電晶體的物理結構，物理上的限制，如ft及fmax，及雜訊來源。在高資料傳輸下，一個寬頻的放大器，往往是決定資料傳輸的快慢。寬頻的技巧，如shunt-peaking， ft doubler及分佈式架構，分別被討論。最後利用台積電與聯電的製程分別實現了兩顆寬頻放大器A，B。A寬頻放大器，頻寬為DC-6GHz，小訊號增益約為12~13dB，大於10 dB的輸入輸出回返損耗，雜訊指數在6dB以下，輸入1-dB增益壓縮點-16 dBm，輸入三階截斷點在-5 dBm。B寬頻放大器，頻寬為1-8GHz，小訊號增益約為8~9dB，大於8 dB的輸入輸出回返損耗，在1-5GHz，雜訊指數在5 dB以下，輸入1-dB增益壓縮點-7 dBm，輸入三階截斷點在1 dBm。
第四章為混波器之探討，一開始介紹各種混波器的架構，如單旁波帶混波器，鏡像抑制混波器，多閘級混波器，變壓器耦合混波器，及偶次諧波混波器。也簡單地闡述了混波器各參數的重要性，如線性度，隔離度…。在此我們針對線性度的加強，實現二個混波器。一為吉伯式混波器之變型，把原先以NMOS的轉導放大器，用PMOS取代。一為利用多閘級的架構，減低轉導係數的二次項的影響。最後利用變壓器耦合的觀念，實現折疊型混波器，以便於低電壓操作。改良型吉伯式混波器，操作在2.4GHz，轉換損耗為0.3dB，P1dB增益壓縮點為-2dBm，隔離度大於20dB，IIP3截斷點約為6dBm。多閘級混波器，操作在1.2GHz，轉換損耗為6.5dB，P1dB增益壓縮點為-1dBm，隔離度大於30dB，IIP3截斷點約為8dBm。變壓器耦合混波器，操作在5.8GHz，轉換損耗為1.6dB，P1dB增益壓縮點為-3dBm，隔離度大於40dB，IIP3截斷點約為3dBm。
第五章為壓控振盪器之設計，一開始對振盪器之參數做一些簡單的介紹及低相位雜訊指數做了一些探討。在此設計一個操作在10GHz的壓控振盪器，約有200MHz頻率調整範圍，約有-3.5dBm輸出功率，在振盪頻率距1MHz頻偏下有-106dBc/Hz的相位雜訊。最後，也根據之前所建立之被動元件資料庫，設計兩個壓控振盪器，分別使用單端驅動及對稱性差動驅動電感。而從分析得知使用差動性電感有較低的相位雜訊，而量測結果也顯示使用差動性電感之振盪器比使用單端驅動電感之振盪器大於8的優化質量指標。單端驅動電感之振盪器，有320MHz振盪頻率調整範圍，約-4.5 dBm輸出功率，在振盪頻率距1MHz頻偏下有-102dBc/Hz的相位雜訊。而差動驅動電感之振盪器，有220MHz振盪頻率調整範圍，約-6.8 dBm輸出功率，在振盪頻率距1MHz頻偏下有-112dBc/Hz的相位雜訊。

摘要(英)

The thesis investigates the analysis, design and implementation of RF-end circuits for wireless transceiver with silicon-based process, such as low-noise amplifier, mixer, and voltage-controlled-oscillator, and some modeling of passive elements that needed in the circuits, such as inductor, transformer and pad. In passive elements like inductors, we study a series of researches and analysis to get higher quality factor with tsmc 0.35-μm process. UMC and tsmc 0.18-μm CMOS processes are adopted to implement the RF integrated circuits (RFICs). We also build inductor library and use them to design C-band VCOs. The thesis is divided into 6 chapters. According to different circuit design approach, the design and measurement are discussed in detail in each chapter.
The challenges in the RFIC design are introduced in Chapter 1. The passive elements, such as inductors, transformers, microstrip-line and pad are discussed in Chapter 2. The most important parameters of inductor are the resonant frequency, quality factor Q and occupied area. Several methods to enhance quality factor are also discussed, which include symmetrical-differential inductor, pattern-ground-shield inductor and deep-trench-mesh inductors. Furthermore, a compact 3-D stacked inductor is also introduced. In pattern-ground-shield inductor, there are four materials as shielding. They are Nwell, Poly, (N+ diffusion) and metal layers, respectively. From experimental data, the poly layer for PGS obtains the best performance.
The low noise amplifier and wideband amplifier design are presented in Chapter 3. Some circuit architectures for LNA and wideband techniques are also described. The physical structure and the figure of merit of transistor such as cut-off frequency ft, maximum oscillation frequency fmax, maximum available gain Gmax and noise sources are introduced. A wideband amplifier can be applied for the high data rate transmission. The techniques for the wideband amplifier, such as shunt-peaking, ft doubler and distributed structure, are explored. After then, two wideband amplifiers named A and B circuits are implemented by tsmc and UMC CMOS processes, respectively. A circuit obtains a 6-GHz bandwidth of 12~13dB gain with 1-dB gain-flatness. The input/output return losses are better than 10dB. The achieved noise figure is better than 6 dB. The measured input P1dB of -16dBm and input IP3 is -5dBm. B circuit obtains a 7-GHz bandwidth of 8~9dB in gain with 1-dB gain-flatness. The measured input/output return losses are better than 8dB. The achieved noise figure is better than 5dB. The measured input P1dB is -7dBm and input IP3 is 1dBm.
The mixer design is explored in Chapter 4. Various circuit architectures for mixer, such as single-sideband, image-reject, multi-gated, transformer-coupled and sub-harmonic mixers are introduced here. The important parameters of mixer, such as conversion gain, linearity, port-to-port isolations are also introduced. Two special mixers are proposed to enhance their linearity. The first circuit is a modified Gilbert-cell mixer which uses PMOS to replace NMOS as a transconductance amplifier. The other mixer is implemented with multi-gated structure. The transconductance gm can be linearized to reduce non-linearity effect. In order to operate at low voltage supply, a folded-current mixer with transformer-coupled is implemented. The modified Gilbert-cell mixer achieves a conversion gain of -0.3dB, input P1dB of -2dBm, input IP3 of 6dBm at 2.4GHz. The port-to-port isolations are better than 20dB. The multi-gated mixer achieves a conversion gain of -6.5dB, input P1dB of -1dBm, input IP3 of 8dBm at 1.2GHz. The port-to-port isolations are better than 30dB. The transformer-coupled mixer achieves a conversion gain of -1.6dB, input P1dB of -3dBm and input IP3 of 3dBm at 5.8GHz. The port-to-port isolations are better than 40dB.
Voltage-controlled-oscillator (VCO) design is presented in Chapter 5. The parameters of VCO and low phase noise design are firstly introduced. A designed 10GHz VCO achieves a turning range of 200MHz, output power of -3.5dBm, and phase noise about -106dBc at 1MHz offset frequency. Based on our built inductor, two VCOs with singled-ended and differential-driven inductors are designed for comparison. The VCO with differential-driven inductor achieves the better phase noise performance. Not only by theory but also by measured data have shown, the figure of merit (FOM) of the VCO with differential-driven inductor accomplishes 8 higher than that of with single-ended inductor. The VCO with single-ended inductor achieves a turning range of 320MHz, output power of -4.5dBm and phase noise about -102dB/Hz at 1MHz offset frequency. The VCO with differential-driven inductor achieved a turning range 210MHz, output power of -6.8dBm and phase noise about -112dB/Hz at 1MHz offset frequency.

關鍵字(中)

★ 電感
★ 低雜訊放大器
★ 混波器
★ 壓控振盪器
★ 射頻

關鍵字(英)

★ mixer
★ LNA
★ inductor
★ RF
★ VCO

論文目次

Table of Contents
TABLE OF CONTENTS VI
LIST OF TABLES VIII
LIST OF FIGURES VIII
.CHAPTER:1 INTRODUCTION 1
1-1 MOTIVATION 1
1-2 CHALLENGES OF CMOS RF DESIGN 1
1-3 RESEARCH GOALS 2
1-4 THESIS OUTLINE 2
.CHAPTER:2 PASSIVE COMPONENTS ON SILICON SUBSTRATE 3
2-1 INTRODUCTION 3
2-2 LOSS MECHANISMS OF INDUCTOR 3
2-2.1 Metal Losses 3
2-2.2 Substrate Loss 5
2-2.3 Substrate Coupling 6
2-3 PAD DE-EMBEDDING AND MODELING 7
2-3.1 PAD De-embedding 7
2-3.2 Modeling 9
2-4 DESIGN OF ON-CHIP SILICON PASSIVE COMPONENTS 11
2-4.1 Design Guide to On-chip Silicon Inductor 11
2-4.2 Definition of Q factor and Resonate frequency 13
2-4.3 Enhancement of Q-factor 14
2-4.4 Transformer and balun Design [14] 18
2-4.5 Transmission Line 21
2-4.6 PAD Modeling 21
2-5 MEASUREMENT RESULT 23
2-5.1 The modeling of multi-layer square and octagon inductors 23
2-5.2 The modeling of multi-layer balanced inductors with circle shape and 3D stacked inductors [17-18] 25
2-5.3 The effect of various Pattern Ground Shield (PGS) in Spiral Inductors [7, 9-10, 11] 27
2-5.4 High fres Spiral Inductor with Pre-metal Deep Trenches [12] 30
2-5.5 Common Center-tap differential balanced Inductors [13, 15] 32
2-5.6 Circle Transformer 35
2-5.7 Comparison Shielding with un-Shielding Pad 37
.CHAPTER:3 WIDEBAND AMPLIFIER DESIGN 39
3-1 INTRODUCTION 39
3-2 LNA BASIC CONCEPTS 39
3-2.1 Transistor Modeling 39
3-2.2 LNA parameters [38, 39] 42
3-3 BANDWIDTH ENHANCER 45
3-3.1 Zeros as Bandwidth Enhancer [39, 44] 45
3-3.2 Unit Gain-Frequency Doublers (Double ft) [54-55] 46
3-3.3 Distributed structure [49-53] 47
3-4 MEASUREMENT RESULT AND DISCUSSION 48
3-4.1 Wideband Amplifier for multi-mode transceiver (1) by UMC 0.18-μm CMOS process 49
3-4.2 Wideband Amplifier for multi-mode transceiver (2) by tsmc 0.18-μm CMOS process 52
3-4.3 Wideband Amplifier (3) by tsmc 0.18-μm CMOS process 56
.CHAPTER:4 MIXER DESIGN 58
4-1 INTRODUCTION 58
4-2 CIRCUIT TOPOLOGY 58
4-2.1 Fundamental structure 58
4-2.2 Linearization & Low Power Mixer 62
4-2.3 Sub-harmonic Mixer[ 64-67] 66
4-3 MEASUREMENT RESULT AND DISCUSSION 67
4-3.1 Modified Gilbert-cell Mixer by tsmc 0.18-μm CMOS Process 67
4-3.2 Multi-gate linearization Mixer by UMC 0.18-μm CMOS 70
4-3.3 0.8-V Transformer-based Mixer by tsmc 0.18-μm CMOS process 73
.CHAPTER:5 VOLTAGE-CONTROLLED-OSCILLATOR DESIGN 77
5-1 INTRODUCTION 77
5-2 LC VCO DESIGN THEORY 77
5-2.1 Specifications of VCO 78
5-3 LOW PHASE NOISE DESIGN [72, 74-77] 80
5-4 MEASUREMENT RESULT AND DISCUSSION 83
5-4.1 10-GHz VCO by tsmc 0.18-μm process 83
5-4.2 Comparisons of Voltage-Control-Oscillators with Self-design Single and Differential Inductor by tsmc 0.35-μm 2P4M CMOS Process 86
5-4.3 16GHz VCO by tsmc 0.18-μm 1P6M CMOS Process 92
.CHAPTER:6 CONCLUSION & FUTURE WORK 95
6-1 CONCLUSIONS 95
6-2 FUTURE WORKS 96
REFERENCES 97
APPENDIX 105
I. MODEL FITTING 105
II. MINIMUM REQUIRED CMAX/CMIN-RATIO 111

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指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2005-7-19

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