參考文獻 |
REFERENCE
[1] D. Zoschg, W. Wilhelm, T. F. Meister, H. Knapp, H.-D. Wohlmuth, K.
Aufinger, M. Wurzer, J. Bock, H. Schafer, and A. Scholtz, “2 dB noise
figure, 10.5 GHz LNA using SiGe bipolar technology,” Electron. Lett.,
vol. 35, no. 25, pp. 2195-2196, Dec. 1999.
[2] H. Knapp, D. Zoschg, T. Meister, K. Aufinger, S. Boguth, and L.
Treitinger, “15 GHz wideband amplifier with 2.8 dB noise figure in SiGe
biploar technology,” in Proc. IEEE RFIC Symp. Dig., pp. 287-290, May 2001.
[3] T. K. K. Tsang and M. N. El-Gamal, “Gain controllable very low voltage
(<1 V) 8-9 GHz integrated CMOS LNAs,” in IEEE RFIC Symp. Dig., pp. 205-
208, June, 2002.
[4] K.-L. Deng, M.-Da. Tsai, C.-S. Lin, K.-Y. Lin, H. Wang, S. H. Wang, W. Y.
Lien and John G. J. Chern, “A Ku-band CMOS Low-Noise Amplifier,” in
IEEE RFIT, pp. 183-186, Dec. 2005.
[5] K.-J. Sun, Z.-M. Tsai, K.-Y. Lin, and H. Wang, “A Noise Optimization
Formulation for CMOS Low-Noise Amplifiers With On-Chip Low-Q Inductors,”
IEEE Trans. Microw. Theory Techn., vol. 54, no. 4, pp. 1554-1560, Apr.
2006.
[6] S. Mou, J.-G. Ma, K. S. Yeo, and M. A. Do, “A Modified Architecture Used
for Input Matching in CMOS Low-Noise Amplifiers,” IEEE Trans. on Circuits
and Systems-II: Express Briefs, vol. 52, no. 11, pp. 784-788, Nov. 2005.
[7] K. Han, J. Gil, S.-S. Song, J. Han, H. Shin, C.-K. Kim, and K. Lee,
“Complete High-Frequency Thermal Noise Modeling of Short-Channel MOSFETs
and Design of 5.2-GHz Low Noise Amplifier,” IEEE J. of Solid-State
Circuits, vol. 40, no. 3, pp. 726-735, Mar. 2005.
[8] H.-W. Chiu, S.-S. Lu, and Y.-S. Lin, “A 2.17-dB NF 5-GHz-Band Monolithic
CMOS LNA With 10-mW DC Power Consumption,” IEEE Trans. Microw. Theory
Techn., vol. 53, no. 3, pp. 813-824, Mar. 2005.
[9] L.-J. Lu, H.-H. Hsieh, and Y.-S. Wang, “A Compact 2.4/5.2-GHz CMOS Dual-
Band Low-Noise Amplifier,” IEEE Microwave and Wireless Components
Letters, vol. 15, no. 10, pp. 685-687, Oct. 2005.
[10] S. Asgaran, M. J. Deen, and C.-H. Chen, “A 4-mW Monolithic CMOS
LNA at 5.7 GHz With the Gate Resistance Used for Input Matching,” IEEE
Microwave and Wireless Components Letters, vol. 16, no. 4, pp. 188-190,
Apr. 2006.
[11] A. Bevilacqua, C. Sandner, A. Gerosa, and A. Neviani, “A Fully
Integrated Differential CMOS LNA for 3─5-GHz Ultrawideband Wireless
Receivers,” IEEE Microwave and Wireless Components Letters, vol. 16, no.
3, pp. 134-136, Mar. 2006.
[12] F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, “Generating All Two-
MOS-Transistor Amplifiers Leads to New Wide-Band LNAs,” IEEE J. of Solid-
State Circuits, vol. 36, no. 7, pp. 1032-1040, July 2001.
[13] F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, “Wide-Band CMOS Low-
Noise Amplifier Exploiting Thermal Noise Canceling,” IEEE J. of Solid-
State Circuits, vol. 39, no. 2, pp. 275-282, Feb. 2004.
[14] R. C. Liu, K. L. Deng, and H. Wang, “A 0.6-22-GHz broadband CMOS
distributed amplifier,” in Proc. IEEE RFIC Symp., pp. 103-106, June 2003.
[15] R. C. Liu, C. S. Lin, K. L. Deng, and H. Wang, “A 0.5-14-GHz 10.6dB CMOS
cascode distributed amplifier,” in Proc. IEEE VLSI Circuits Symp, pp.
139-140, June 2003.
[16] M.-D. Tsai, K.-L. Deng, and H. Wang, C.-H. Chen, C.-S. Chang, and J. G.
J. Chern, “A miniature 25-GHz 9-dB CMOS cascaded single-stage
distributed amplifier,” IEEE Microwave and Wireless Components Letters,
vol. 14, no. 12, pp. 554–556, Dec. 2004.
[17] R. E. Amaya, N. G. Tarr, and C. Plett, “A 27 GHz fully integrated CMOS
distributed amplifier using coplanar waveguide,” in Proc. IEEE RFIC
Symp., pp. 193-196, June 2004.
[18] S. Galal and B. Razavi, “40-Gb/s amplifier and ESD protection circuit in
0.18-μm CMOS technology,” in IEEE J. Solid-State Circuits, vol. 39, no.
12, pp. 2389-2396, Dec. 2004.
[19] T.-Y. Chen, J.-C. Chien, and L.-H. Lu, “A 45.6-GHz Matrix Distributed
Amplifier in 0.18-μm CMOS,” in Proc. IEEE Custom Integrated Circuits
Conference (CICC), pp. 119–122, Sep. 2005.
[20] R. C. Liu, C. S. Lin, K. L. Deng, and H. Wang, “Design and Analysis of
DC-to-14-GHz and 22-GHz CMOS Cascode Distributed Amplifiers,” in IEEE J.
Solid-State Circuits, vol. 39, no. 8, pp. 1370-1374, Aug. 2004.
[21] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits,
Cambridge, U.K.: Cambridge Univ. Press, 1998.
[22] L. Jia, J.-G. Ma, K. S. Yeo, and M. A. Do, “9.3-10.4-GHz-Band Cross-
Coupled Complementary Oscillator With Low Phase-Noise Performance,” IEEE
Trans. Microw. Theory Techn., vol. 52, no. 4, pp. 1273–1278, Apr. 2004.
[23] T. K. K. Tsang and M. N. El-Gamal, “A High Figure of Merit and Area-
Efficient Low-Voltage (0.7-1V) 12GHz CMOS VCO,” in Proc. IEEE RFIC
Symp., pp. 89-92, June 2003.
[24] L. Perraud, J.-L. Bonnot, N. Sornin, and C. Pinatel, “Fully-Integrated
10 GHz CMOS VCO for multi-band WLAN applicattions,” in IEEE European
Solid-State Circuits, pp. 353-356, 2003.
[25] N.-J. Oh and S.-G Lee, “11-GHz CMOS Differential VCO With Back-Gate
Transformer Feedback,” IEEE Microwave and Wireless Components Letters,
vol. 15, no. 11, pp.733–735, Nov. 2005.
[26] S. Lo and S. Hong, “Noise Property of a Quadrature Balanced VCO,” IEEE
Microwave and Wireless Components Letters, vol. 15, no. 10, pp.673–675,
Oct. 2005.
[27] S. L. J. Gierkink, S. Levantino, R. C. Frye, C. Samori, and V. Boccuzzi,
“A Low-Phase-Noise 5-GHz Quadrature VCO Using Superharmonic Coupling,”
in IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1148-1154, July 2003.
[28] H.-R. Kim, and C.-Y. Cha, and S.-M. Oh, M.-S. Yang, and S.-G. Lee, “A
Very Low-Power Quadrature VCO With Back-Gate Coupling,” in IEEE J. Solid-
State Circuits, vol. 39, no. 6, pp. 952-955, June 2004.
[29] J. Y. Chang, C.-H. W, and S.-I. Liu, “A Low-Phase-Noise Low-Phase-Error
2.4GHz CMOS Quadrature VCO,” in Proc. IEEE Asian Solid-State Circuits
Conference, pp. 281–284, Nov. 2005.
[30] A. Fard and P. Andreani, “A Low-Phase-Noise Wide-Band CMOS Quadrature
VCO for Multi-Standard RF Front-Ends,” in Proc. IEEE RFIC Symp., pp. 539- 542, June 2005.
[31] S-M Moon, M-Q Lee, and B-S Kim, “Design of Quadrature CMOS VCO using
Source Degeneration Resistor,” in Proc. IEEE RFIC Symp., pp. 535-538,
June 2005.
[32] P. Andreani, A. Bonfanti, L. Romano, and C. Samori, “Analysis and Design
of a 1.8-GHz CMOS LC Quadrature VCO,” IEEE J. Solid-State Circuits, vol.
37, no. 12, pp. 1737-1747, Dec. 2002.
[33] A. Hajimiri and T. H. Lee, “A General Theory of Phase Noise in
Electrical Oscillators,” IEEE J. Solid-State Circuits, vol. 33, no. 2,
pp. 179-194, Feb. 1998.
[34] R. Aparicio and A. Hajimiri, “A Noise-Shifting Differential Colpitts
VCO,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1728-1736, Dec.
2002.
[35] A. Hajimiri and T. H. Lee, “Design Issues in CMOS Differentail LC
Oscillators,” IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 717-724,
May 1999.
[36] E. Hegazi, H. Sjoland, and A. A. Abidi, “A Filtering Technique to Lower
LC Oscillator Phase Noise,” IEEE J. Solid-State Circuits, vol. 36, no.
12, pp. 1921-1930, Dec. 2001.
[37] P. Andreani and S. Mattisson, “On the Use of MOS Varactors in RF VCO’
s,” IEEE J. Solid-State Circuits, vol. 35, no. 6, pp. 905-910, June 2000.
[38] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS Low Noise
Amplifier,” IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745-759,
May 1997.
[39] G. Gonzalez, 1996, Microwave Transistor Amplifiers Analysis and Design,
2nd ed. Prentice-Hall, Inc.
[40] B. Razivi, 1997, RF Microelectronics, Prentice Hall PTR.
[41] C. R. C. De Ranter, M. S. J. Steyaert, “A 0.25-μm CMOS 17 GHz VCO,” I.
Solid-State Circuits, session 23, pp. 370-371, Feb 2001.
[42] S. Ko, J.-G. Kim, T. Song, E. Yoon, and S. Hong, “20 GHz Integrated CMOS
Frequency Sources with a Quadrature VCO using Transformers,” in Proc.
IEEE RFIC Symp., pp. 269-272, June 2004.
[43] T.-P. Wang, R.-C. Liu, H.-Y. Chang, L.-H. Lu, and H. Wang, “A 22-GHz
Push-Push CMOS Oscillator Using Micromachined Inductors,” IEEE Microwave
and Wireless Components Letters, vol. 15, no. 12, pp. 859–861, Dec. 2005.
[44] Alan W.L. Ng, Gerry C.T. Leung, Ka-Chun Kwok, Lincoln L.K. Leung, Howard
C. Luong, “A 1V 24GHz 17.5mW PLL in 0.18 μm CMOS,” I. Solid-State
Circuits, session 8, pp. 158-160, Feb. 2005.
[45] J. J. Rael and A. A. Abidi, “Physical Process of Phase Noise in
Differential LC Oscillators,” IEEE Custom Integrated Circuits
Conference, pp. 569-572, May 2000.
[46] T. Song, S. Ko, D.-H. Cho, H.-S. Oh, C. Chung, and E. Yoon, “A 5GHz
Transformer-Coupled CMOS VCO Using Bias-Level Shifting Technique,” in
Proc. IEEE RFIC Symp., pp. 127-130, June 2004.
[47] 林正杰,“應用於寬頻劃碼多工進階及雙頻無線區域網路之射頻收發機研製,”碩士論
文, 2004, 國立中央大學。
[48] 劉偉正, “應用於ISM與Ka頻段之射頻收發機前端電路研製,” 碩士論文, 2004, 國
立中央大學。
[49] 杜信龍, “無線收發機前端電路與相關被動電路之研製,” 碩士論文, 2005, 國立中
央大學。 |