Ka頻段低相位雜訊雙推式振盪器之研製

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姓名

鄒育霖(Yu-Lin Zou) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

Ka頻段低相位雜訊雙推式振盪器之研製
(Study on Ka-band Low Phase Noise Push-Push Oscillator)

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摘要(中)

本論文所研究的內容為微波振盪器之積體電路設計，為降低高頻振盪器的相
位雜訊，論文使用雙推式振盪器架構，並且以理論證明此架構確實可有效改善相
位雜訊。使用WIN pHEMT 0.15-μm 製程的電路包括(1)Ka-頻段基頻壓控振盪
器，振盪頻率為24.97 GHz，可調頻率範圍270 MHz，偏移主頻1 MHz 之相位雜
訊為-96.84 dBc/Hz；(2)Ku-頻段有限接地之共面波導基頻振盪器，振盪頻率14.75
GHz，偏移主頻1 MHz 之相位雜訊為-118.96 dBc/Hz，優化指數(FOM)為-191.8
dBc/Hz ；(3)Ka-頻段有限接地之共面波導雙推式振盪器，振盪頻率為30.3 GHz，
偏移主頻1MHz 之相位雜訊為-113.2 dBc/Hz，優化指數為-188.16 dBc/Hz 。最後
是使用TSMC CMOS 0.18-μm 製程所實現的(4)Ka-頻段交互耦合之雙推式壓控振
盪器，振盪頻率為26.7 GHz，可調頻率範圍為1.95 GHz，偏移主頻1 MHz 之相
位雜訊為-117.5 dBc/Hz。且此電路展現出優異的優化指數為-199.82 dBc/Hz。

摘要(英)

The content of this thesis is about microwave oscillator integrated circuit design.
The push-push oscillator topology is used in this thesis to lower phase noise of high
oscillation frequency oscillator. General phase noise theory on push-push oscillator is
developed to prove it’s naturally having low phase noise property. WINTM pHEMT
0.15-μm technology is adopted to implement：(1) Ka-band fundamental VCO. The
oscillation frequency is 24.97 GHz, tuning range is 270 MHz, and phase noise is
-96.84 dBc/Hz at 1MHz offset；(2) The second circuit is a Ku-band Finite Ground (FG)
CPW fundamental oscillator. The oscillation frequency is 14.75 GHz, phase noise is
-118.96 dBc/Hz at 1 MHz offset, and -191.8 dBc/Hz of Figure-of-Merit(FOM)；(3)
The third circuit is a Ka-band FG CPW push-push oscillator. The oscillation
frequency is 30.3 GHz, phase noise is -113.2 dBc/Hz at 1MHz offset, and FOM is
-188.16 dBc/Hz. Finally, TSMC CMOS 0.18-μm technology is adopted to implement
the fourth circuit which is a Ka-band cross-coupled push-push VCO. The oscillation
frequency is 26.7 GHz, tuning range is 1.95 GHz, phase noise is -117.5 dBc/Hz at
1MHz offset and exhibited an excellent FOM of -199.82 dBc/Hz.

關鍵字(中)

★ 雙推式

關鍵字(英)

★ push push

論文目次

目錄
第一章、緒論 1
1-1、研究動機 1
1-2、研究成果 1
1-3、章節概述 2
第二章、微波光子接收機之本地端電路研製 3
2-1、毫米波收發機簡介 3
2-2、WIN GaAs 0.15-μm pHEMT 製程技術簡介 4
2-3、振盪器原理分析 5
2-3-1、巴克豪森振盪原理分析 6
2-3-2、負電阻振盪原理分析 8
2-3-3、電晶體之穩定度分析 13
2-4、相位雜訊理論分析 16
2-4-1、相位雜訊之定義 16
2-4-2、相位雜訊對射頻通訊系統之影響 17
2-4-3、雷森公式理論 18
2-4-4、時變相位雜訊模型的建立 20
2-4-5、改善相位雜訊之方式 26
2-5、Ka-頻段基頻壓控振盪器設計 28
2-5-1、電路架構及設計原理分析 28
2-5-2、Ka-頻段基頻壓控振盪器之量測結果 31
第三章、低相位雜訊之雙推式振盪器設計 34
3-1、雙推式振盪器簡介 34
3-1-1、架構簡介 34
3-1-2、雙推式模態之理論 35
3-1-3、架構比較 38
3-2、雙推式振盪器架構之相位雜訊分析 40
V
3-2-1、相位雜訊模型之建立 40
3-3、有限接地共平面波導之基頻與雙推式振盪器設計 43
3-3-1、Ku-頻段基頻振盪器電路之架構及設計流程 43
3-3-2、Ku-頻段基頻振盪器之量測結果 45
3-3-3、Ka-頻段雙推式振盪器之實現及量測結果 47
3-3-4、基頻振盪器與雙推式振盪器之結果討論 51
第四章、應用於Ka 頻段之CMOS雙推式壓控振盪器設計 55
4-1、CMOS 電晶體模型分析 55
4-2、Ka-頻段CMOS 交互耦合之雙推式振盪器架構理論分析 58
4-2-1、子電路架構之比較 58
4-2-2、Ka-頻段CMOS 交互耦合雙推式壓控振盪器設計原理與流程 59
4-2-3、NP 互補式交互耦合雙推式振盪器架構之時變相位雜訊模型 63
4-3、Ka-頻段CMOS 交互耦合雙推式壓控振盪器之量測結果 70
4-4、晶片之結果與討論 74
第五章、結論 78
5-1、論文重點 78
5-2、論文貢獻 79
5-3、未來研究 79
參考文獻 80

參考文獻

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指導教授

邱煥凱(Hwann-Kaeo Chiou)

審核日期

2006-7-19

推文