應用氮化矽做為穿隧介電層之鍺量子點電晶體之研製; the fabrication of Germanium nanocrystal MOSFET with SiN tunneling dielectric technology

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > Electronic Thesis & Dissertation > Item 987654321/10330

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Title:	應用氮化矽做為穿隧介電層之鍺量子點電晶體之研製;the fabrication of Germanium nanocrystal MOSFET with SiN tunneling dielectric technology
Authors:	楊露瑜;Lu-Yu Yang
Contributors:	電機工程研究所
Keywords:	非揮發性記憶體;memory
Date:	2008-07-11
Issue Date:	2009-09-22 12:12:35 (UTC+8)
Publisher:	國立中央大學圖書館
Abstract:	在本論文中，利用低壓化學氣相沉積系統沉積複晶矽鍺並利用氧化之方式形成鍺奈米晶粒製作出浮點電晶體，另一方面，我們以高介電層材料取代傳統的二氧化矽做為穿隧介電層以提升寫入的速度;在製作浮點電晶體過程中，我們也開發了閘堆疊蝕刻的部份，因為浮點電晶體閘堆疊層中的鍺奈米晶粒是否蝕刻乾淨會嚴重影響元件的製作與特性。我們利用製作出來的電晶體做了以下幾項的電性量測包含:室溫下儲存時間量測、脈波量測、耐用性量測等，藉由以上的量測，我們可以清楚知道所製作的元件之特性。 In this thesis, we utilize selective thermal oxidation of poly SiGe to form Ge nanocrystals embedded in SiO2 and then fabricate the Ge nanocrystals transistor. In addition, using high-K material to replace the conventional robust SiO2 enhances programming speed. In the fabrication process, we have also developed the gate stack etch technique, because of Ge nanocrystals embedded in gate stack has been removed or not affects the following fabrications and characterization of device tremendously. When the fabrication of device has been completed, we take some measurements including, pulse response, endurance measurement and retention time at room temperature. According to the result of measurements, we can realize the characterization of our device and the problems of device structure
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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