Institution of Engineering and Technology;Stevenage: Institution of Engineering and Technology
Abstract:
摘要： This work presents an inductor with a high quality factor (Q) that is fabricated using wafer-level integrated passive device (IPD) technology and a 5.2 GHz differential low noise amplifier (DLNA) in a Taiwan semiconductor manufacturing company (TSMC(TM)) 0.18 µm complementary metal-oxide-semiconductor (CMOS) process. The IPD inductors were stacked on top of a CMOS DLNA. The use of IPD inductors in the input matching network (IMN) is an efficient alternative to on-chip inductors for mass production. The performance of the DLNA with and without an IPD inductor is studied. The IPD CMOS-DLNA achieves a noise figure (NF) of 2.1 dB with a power consumption of 10 mW. The measured NF of the CMOS-IPD DLNA is 0.6 dB better than that of the typical CMOS DLNA at the same power consumption. The CMOS-IPD DLNA achieves the best figure of merit of any of the recently described 5-6 GHz CMOS LNAs. 出版者： Stevenage: Institution of Engineering and Technology 出版日期： 2012-08-21 出處： IET microwaves, antennas & propagation, 2012-08, Vol.6 (11), p.1286-1290 版權： 2015 INIST-CNRS 版權： Copyright The Institution of Engineering & Technology Aug 2012 識別號： ISSN: 1751-8725 識別號： EISSN: 1751-8733 識別號： DOI: 10.1049/iet-map.2011.0274
