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    Please use this identifier to cite or link to this item: https://ir.lib.ncu.edu.tw/handle/987654321/106485


    Title: A wide supply voltage range and low-power all-digital clock generator
    Authors: 鄭國興;Cheng, Kuo-Hsing;Liu, Jen-Chieh;Huang, Hong-Yi;Chen, Yu-Tso
    Contributors: 資訊電機學院電機工程學系
    Keywords: Circuits;Circuits and Systems;Clock generators;CMOS;Dividers;Electric potential;Electrical Engineering;Engineering;Measuring instruments;Oscillators;Signal,Image and Speech Processing;Voltage
    Date: 2013-03-01
    Issue Date: 2026-04-23 13:24:43 (UTC+8)
    Publisher: Springer Netherlands;Boston: Springer US
    Abstract: 摘要: This study presents a low-power all-digital clock generator (ADCG) for a wide supply voltage range system. The proposed ADCG limits the maximum supply current to 100 μA at a supply voltage ranging from 1.6 to 3.6 V. The ADCG also uses a digitally controlled oscillator (DCO) to extend its operational frequency range. The proposed DCO controls the supply current and divider circuits for a wide supply voltage range. The output duty cycle of ADCG falls within 50 ± 1.9 % using a duty cycle corrector. The maximum peak-to-peak jitter is less than 2.7 % at 8.38 MHz for a digital water meter application (DWM). The operational frequencies of 1.45 and 8.38 MHz at 1.8 V are 3.1 and 36.7 μA, respectively. The core area of ADCG is 0.14 mm 2 for a 0.35 μm CMOS process. The operational frequency of ADCG ranges from 4.5 to 9.2 MHz at a supply voltage ranging from 1.6 to 3.6 V. This clock generator can also be applied to microcontroller applications.
    其他題名: Analog Integr Circ Sig Process
    出版者: Boston: Springer US
    出版日期: 2013-03
    出處: Analog integrated circuits and signal processing, 2013-03, Vol.74 (3), p.517-526
    版權: Springer Science+Business Media New York 2013
    識別號: ISSN: 0925-1030
    識別號: EISSN: 1573-1979
    識別號: DOI: 10.1007/s10470-012-0022-6
    Appears in Collections:[Department of Electrical Engineering] journal & Dissertation

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