Institute of Electrical and Electronics Engineers Inc.;IEEE
摘要:
摘要： This paper analyzes the impacts of read-assist and write-assist circuits on GeOI FinFET 6T SRAM cells considering intrinsic random variations, process corner, and temperature variation. The word-line under-drive (WLUD) read-assist is more efficient to improve the read static noise margin and read V MIN of fast-N slow-P corner GeOI FinFET SRAM cells compared with the Silicon-On-Insulator (SOI) counterparts. GeOI FinFET SRAM cells with WLUD show less cell read access-time degradation compared with the SOI counterparts at both 25 °C and 125 °C. With transient voltage collapse (TVC) write-assist, the write-ability and variation tolerance of GeOI and SOI FinFET SRAM cells are improved. The temperature dependence of data retention time is different between the GeOI and SOI FinFET SRAM cells. The maximum TVC write-assist pulsewidth constrained by the data retention failure is smaller in GeOI FinFET SRAMs at 25 °C and becomes comparable at 125 °C compared with the SOI FinFET SRAMs. 其他題名： TED 出版者： IEEE 出版日期： 2015-06-01 出處： IEEE transactions on electron devices, 2015-06, Vol.62 (6), p.1710-1715 資源來源： IEEE Electronic Library (IEL) 識別號： ISSN: 0018-9383 識別號： EISSN: 1557-9646 識別號： DOI: 10.1109/TED.2015.2412973 識別號： CODEN: IETDAI
