Institute of Electrical and Electronics Engineers Inc.;IEEE
摘要:
摘要： This paper discusses the impact of the back-gate bias on the dc, low-frequency noise, and dynamic behavior characteristics of a p-GaN gate high-electron mobility transistor on silicon substrate. This paper is investigated to understand the physical mechanisms of the back-gate terminal modulation of normally OFF GaN power devices. When a negative backgate bias V B voltage is applied, the 2-D electron gas channel will get closer to AlGaN/GaN heterointerface and interface scattering, such as interface roughness and alloy-disorder scattering will increases significantly, which may be responsible for the increased ON-state resistance (R ON ). Meanwhile, the opportunity for the capture of carriers by deep-level traps is reduced and the low-frequency noise is thereby suppressed. Under positive V B bias, R ON can be reduced but, according to capacitance-voltage measurements and carrier fluctuations extracted from the low-frequency noise spectra, the transported carriers are obviously trapped by the deep-level. 其他題名： TED 出版者： IEEE 出版日期： 2015-02-01 出處： IEEE Transactions on Electron Devices, 2015-02, Vol.62 (2), p.507-511 資源來源： IEEE Electronic Library (IEL) 識別號： ISSN: 0018-9383 識別號： EISSN: 1557-9646 識別號： DOI: 10.1109/TED.2014.2377747 識別號： CODEN: IETDAI
