Design and analysis of robust tunneling FET SRAM

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題名:	Design and analysis of robust tunneling FET SRAM
作者:	胡璧合;Chen, Yin-Nien;Fan, Ming-Long;Hu, Vita Pi-Ho;Su, Pin;Chuang, Ching-Te
貢獻者:	資訊電機學院電機工程學系
關鍵詞:	Applied sciences;Band-to-band tunneling;Design. Technologies. Operation analysis. Testing;Electronic equipment and fabrication. Passive components, printed wiring boards, connectics;Electronics;Exact sciences and technology;Integrated circuits;Integrated circuits by function (including memories and processors);Inverters;MOSFETs;output characteristic;Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices;Semiconductors;SRAM;SRAM cells;Transistors;tunnel FET (TFET);Tunneling;Wireless sensor networks
日期:	2013-02-08
上傳時間:	2026-04-23 13:48:19 (UTC+8)
出版者:	Institute of Electrical and Electronics Engineers Inc.;New York, NY: IEEE
摘要:	摘要： With a steep subthreshold slope, tunneling FETs (TFETs) are promising candidates for ultralow-voltage operation compared with conventional MOSFETs. However, the delayed saturation characteristic and the broad soft transition region result in a large crossover region/current in an inverter, thus degrading the hold/read static noise margin (H/RSNM) of TFET SRAM cells. The write-ability and write static noise margin (WSNM) of TFET SRAM cells are constrained by the unidirectional conduction characteristics and large crossover contention of the write access transistor and the holding transistor. In this paper, we present a detailed analysis of TFET circuit switching/output characteristics/performance and the underlying physics. The stability/performance of several TFET SRAM cells are then analyzed/compared using atomistic technology computer-aided design mixed-mode simulations. Finally, a robust 7T driverless (DL) TFET SRAM cell is proposed. The proposed 7T DL TFET SRAM cell, with better output characteristics in single-gate mode, and decoupled read current path from cell storage node and push-pull write action with asymmetrical raised-cell-virtual-ground write-assist, provides a significant improvement in hold, read, and write stability and performance. 其他題名： TED 出版者： New York, NY: IEEE 出版日期： 2013-03-01 出處： IEEE transactions on electron devices, 2013-03, Vol.60 (3), p.1092-1098 資源來源： IEEE Electronic Library (IEL) 版權： 2014 INIST-CNRS 版權： Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Mar 2013 識別號： ISSN: 0018-9383 識別號： EISSN: 1557-9646 識別號： DOI: 10.1109/TED.2013.2239297 識別號： CODEN: IETDAI
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