Design and implementation of a joint data compression and digital watermarking system in an MPEG-2 video encoder

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Please use this identifier to cite or link to this item: https://ir.lib.ncu.edu.tw/handle/987654321/106938

Title:	Design and implementation of a joint data compression and digital watermarking system in an MPEG-2 video encoder
Authors:	蔡宗漢;Tsai, Tsung-Han;Wu, Chih-Yen;Fang, Chih-Lun
Contributors:	資訊電機學院電機工程學系
Keywords:	Architecture;Circuits and Systems;Computer Imaging;Data compression;Design engineering;Electrical Engineering;Engineering;Frequency domains;Image Processing and Computer Vision;Integrated circuits;Pattern Recognition;Pattern Recognition and Graphics;Signal,Image and Speech Processing;Very large scale integration;Vision;Watermarking
Date:	2014-02-01
Issue Date:	2026-04-23 13:49:39 (UTC+8)
Publisher:	Springer New York;Boston: Springer US
Abstract:	摘要： With the rapid distribution of digital video capture devices, significant videos can be captured effortlessly. The captured videos are often saved in moving pictures expert group-2 (MPEG-2) format. To prove copyright ownership, applying watermarking in MPEG-2 videos is necessary. However, little research has been devoted to the watermarking design not only for the spatial domain but also for the frequency domain and the realization of watermarking hardware. Thus, a joint data compression and watermarking system with configurable spatial and frequency domain embedding, and its very large scale integrated circuit (VLSI) architecture is presented in this paper. First, after analyzing the characteristics of videos, a novel watermarking system with two number-based keys and a shuffled image is built. It is based on the spread spectrum techniques and adaptive human visual system (AHVS). With a consideration of the cost and easiness of use, the proposed system is realized as blind detection which can dispense without the storage of the original-multimedia data. Second, the efficient VLSI architecture of our approach is designed. Various subjective and objective evaluations are performed for watermarking analysis. From the evaluation, it is realized that the system can achieve robust watermarking with high flexibility for joint data compression and low hardware complexity. Various attacks and comparisons also show the efficiency of the proposed watermarking scheme. Furthermore, the VLSI synthesis results demonstrate the high performance of the proposed architecture. Thus, the proposed system is adequate for a specific function intellectual property (IP) combined with a real-time video capture and a surveillance system. 其他題名： J Sign Process Syst 出版者： Boston: Springer US 出版日期： 2014-02 出處： Journal of signal processing systems, 2014-02, Vol.74 (2), p.203-220 資源來源： SpringerLink Journals - AutoHoldings 版權： Springer Science+Business Media New York 2013 識別號： ISSN: 1939-8018 識別號： EISSN: 1939-8115 識別號： DOI: 10.1007/s11265-013-0772-0
Appears in Collections:	[Department of Electrical Engineering] journal & Dissertation

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