Effect of deep N-well bias in an 850-nm Si photodiode fabricated using the CMOS process

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Title:	Effect of deep N-well bias in an 850-nm Si photodiode fabricated using the CMOS process
Authors:	辛裕明;Chou, Fang-Ping;Wang, Ching-Wen;Li, Zi-Ying;Hsieh, Yu-Chen;Hsin, Yue-Ming
Contributors:	資訊電機學院電機工程學系
Keywords:	Avalanche photodiodes;Bandwidth;CMOS ICs;CMOS integrated circuits;CMOS technology;deep N-well;Frequency measurement;photodetectors;photodiodes (PDs);Silicon;Substrates
Date:	2013-04-01
Issue Date:	2026-04-23 13:56:49 (UTC+8)
Publisher:	Institute of Electrical and Electronics Engineers Inc.;IEEE
Abstract:	摘要： In this letter, we present an 850-nm Si octagonal photodiode (PD) with deep n-well implantation formed using the CMOS process without process modifications. Two different bias schemes (normal bias and extra bias) on the deep n-well were used to analyze the effects of deep n-well bias on the bandwidth and gain-bandwidth performances of Si PDs. The avalanche gain, frequency response, and optical pulse measurements in this letter demonstrate that the extra bias on deep n-well improves the PD performance. To the best of our knowledge, this design achieves the highest bandwidth (8.7 GHz) and a large gain-bandwidth product of 542 GHz with a reverse bias of 11.45 V and an extra voltage of 11.45 V in standard CMOS technology. 其他題名： LPT 出版者： IEEE 出版日期： 2013-04-01 出處： IEEE Photonics Technology Letters, 2013-04, Vol.25 (7), p.659-662 資源來源： IEEE Xplore 識別號： ISSN: 1041-1135 識別號： EISSN: 1941-0174 識別號： DOI: 10.1109/LPT.2013.2248352 識別號： CODEN: IPTLEL
Appears in Collections:	[Department of Electrical Engineering] journal & Dissertation

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