Effect of gate length on device performances of AlSb/InAs high electron mobility transistors fabricated using BCl 3 dry etching

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Title:	Effect of gate length on device performances of AlSb/InAs high electron mobility transistors fabricated using BCl 3 dry etching
Authors:	綦振瀛;Kuo, Chien-I;Hsu, Heng-Tung;Hsu, Ching-Yi;Yu, Chia-Hui;Ho, Han-Chieh;Chang, Edward Yi;Chyi, Jen-Inn
Contributors:	資訊電機學院電機工程學系
Date:	2012-06-01
Issue Date:	2026-04-23 13:56:53 (UTC+8)
Publisher:	Japan Society of Applied Physics
Abstract:	摘要： In this paper, we present the development of a mesa isolation process for AlSb/InAs high electron mobility transistors (HEMTs) using inductively coupled plasma (ICP) etching with BCl 3 gas. Devices with different gate lengths ( L g : 60, 100, and 200 nm) fabricated by this dry etching technique show good DC and RF performances. With an appropriate L g /gate-channel distance ratio, the 200-nm-gate has very high peak transconductances of 781 mS/mm at V DS = 0.1 V and 2000 mS/mm at V DS = 0.5 V. Moreover, an extrinsic current gain cutoff frequency of 137 GHz and maximum oscillation frequency of 97 GHz were achieved at a drain bias voltage V DS = 0.3 V, indicating the great potential for such a device operating at high frequency with extremely low DC power consumption. 出版日期： 2012-06-01 出處： Japanese Journal of Applied Physics, 2012-06, Vol.51 (6R), p.60202 資源來源： Institute of Physics Journals 識別號： ISSN: 0021-4922 識別號： EISSN: 1347-4065 識別號： DOI: 10.1143/JJAP.51.060202
Appears in Collections:	[Department of Electrical Engineering] journal & Dissertation

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