Institute of Electrical and Electronics Engineers Inc.;IEEE
摘要:
摘要： In this paper, W-band flip-chip-assembled CMOS chip modules with transition compensation are presented, a three-stage amplifier, a balanced amplifier, and a down-converted Gilbert-cell subharmonic mixer are included in the chip set. The flip-chip process on ceramic integrated passive devices (CIPD) with a bump size of 30 μm × 30 μm × 27 m is developed for millimeter-wave applications. Without the flip-chip transition compensation, the frequency of the return loss of each chip is shifted, which deviates from the bare die measurement results. By applying the compensation network in the transition, the dips of the return loss are tuned back closer to the bare die measurement results. Moreover, a W-band amplifier flip-chip-assembled with a CPW-fed Yagi-Uda antenna on a CIPD and a W-band flip-chip-assembled receiver are presented for SiP integration. The effect of dicing edge variation is also included in the flip-chip model to achieve reasonable agreement between simulated and measured scattering parameters. To the best of our knowledge, this is the first demonstration of a CMOS chip set with flip-chip interconnects in the -band for a system-in-package. 其他題名： TMTT 出版者： IEEE 出版日期： 2012-03 出處： IEEE transactions on microwave theory and techniques, 2012-03, Vol.60 (3), p.766-777 資源來源： IEEE Xplore 識別號： ISSN: 0018-9480 識別號： EISSN: 1557-9670 識別號： DOI: 10.1109/TMTT.2011.2176747 識別號： CODEN: IETMAB
