Institute of Electrical and Electronics Engineers Inc.;IEEE
摘要:
摘要： This paper investigates and compares the impacts of metal-gate work-function variation (WFV) on III-V heterojunction tunnel FET (HTFET), homojunction TFET, and FinFET devices using a novel Voronoi method to capture the realistic metal-gate grain patterns for Technology Computer Aided Design atomistic simulations. Due to the broken-gap nature, HTFET shows significantly steeper subthreshold slope and higher susceptibility to WFV near OFF state. For ON current variation, both the HTFET and homojunction TFET show better immunity to WFV than the III-V FinFET. Device design using source-side underlap to mitigate the impact of WFV on HTFET is also assessed. 其他題名： JEDS 出版者： IEEE 出版日期： 2015-05-01 出處： IEEE Journal of the Electron Devices Society, 2015-05, Vol.3 (3), p.194-199 資源來源： Openly Available Collection - DOAJ 識別號： ISSN: 2168-6734 識別號： EISSN: 2168-6734 識別號： DOI: 10.1109/JEDS.2015.2408356 識別號： CODEN: IJEDAC
