Generalization of an enhanced ECC methodology for low power PSRAM

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Title:	Generalization of an enhanced ECC methodology for low power PSRAM
Authors:	鄭政誠;Chen, Po-Yuan;Su, Chin-Lung;Chen, Chao-Hsun;Wu, Cheng-Wen
Contributors:	文學院歷史研究所
Keywords:	Decision support systems;Decoding;DRAM chips;DRAM-like cell;ECC methodology;Encoding;error control code;Error control codes (ECCs);Error correction codes;fault tolerance;Handheld computers;industrial pseudo-SRAM;low power PSRAM;low-power design;low-power electronics;memory size 256 MByte;parallel decoding;parallel encoding;parity check matrix;parity correction mechanism;portable product;power reduction;pseudo-SRAM;Reliability;SRAM chips;Systematics;word length 16 bit;word length 64 bit
Date:	2013-06-05
Issue Date:	2026-04-23 14:52:56 (UTC+8)
Publisher:	IEEE Computer Society;IEEE
Abstract:	摘要： Error control codes (ECCs) have been widely used to maintain the reliability of memories, but ordinary ECC codes are not suitable for memories with long codewords. For portable products, power reduction in memories with DRAM-like cells can be done by reducing the refresh frequency, but the loss of data integrity should be taken care of seriously. To solve these issues, we have proposed a parallel encoding and decoding ECC scheme to reduce refresh power for an industrial pseudo-SRAM (PSRAM) with long codewords. In this paper, we briefly review the scheme and propose a systematic way to generate the parity check matrix for the new ECC scheme. We also modify the parity correction mechanism to reduce the operating power of the scheme. As for the 70 ns access time of the 256-MB PSRAM with 64-bit codewords and 16-bit I/O, experimental results show that the new ECC scheme can be integrated with the READ/WRITE operations with about 0.2 percent circuit area overhead and less than 3.5 ns encoding/decoding time. The new ECC architecture provides a flexible solution for memories with different widths of ECC codewords and I/O ports, without the error masking effect or reduction in reliability. 其他題名： TC 出版者： IEEE 出版日期： 2013-07-01 出處： IEEE transactions on computers, 2013-07, Vol.62 (7), p.1318-1331 資源來源： IEEE Electronic Library (IEL) 識別號： ISSN: 0018-9340 識別號： DOI: 10.1109/TC.2012.98 識別號： CODEN: ITCOB4
Appears in Collections:	[Graduate Institute of History ] journal & Dissertation

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