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    Please use this identifier to cite or link to this item: https://ir.lib.ncu.edu.tw/handle/987654321/108534


    Title: Reactivation of spares for off-chip memory repair after die stacking in a 3-D IC with TSVs
    Authors: 鄭政誠;Chou, Yung-Fa;Kwai, Ding-Ming;Shieh, Ming-Der;Wu, Cheng-Wen
    Contributors: 文學院歷史研究所
    Keywords: 3-D IC;Activation;Circuits;Design for repair;DRAM;fuse;Fuses;Impedance matching;Integrated circuits;Maintenance engineering;memory repair;memory test;Redundancy;Repair;Semiconductors;Stacking;Three dimensional;Through-silicon vias;Timing;TSV
    Date: 2013-01-01
    Issue Date: 2026-04-23 14:54:04 (UTC+8)
    Publisher: Institute of Electrical and Electronics Engineers Inc.;New York: IEEE
    Abstract: 摘要: Memory, especially DRAM, is one of the candidates to be considered in three-dimensional integrated circuit (3-D IC), and in particular, to be heterogeneously stacked with a system on chip (SOC) for mobile applications. Even though the memory is tested and repaired beforehand, the known good die (KGD) can become bad during the integration process. Traditional schemes may not be able to redo the repair and obtain a known good stack (KGS), let alone unused spares be reused. We propose an off-chip repair scheme to deal with the inaccessibility from outside of the memory die. Using a through silicon via (TSV) to access the redundancy control circuit (RCC), we reactivate the unused spares by overwriting their states as if the corresponding fuses are blown. Even when the row or column, which has already been repaired, is damaged again, we are able to replace it with a new spare. Our simulation using a 65 nm process technology shows that the maximum timing penalty of the off-chip repair is only 93ps, compared to the on-chip method. The area overhead is estimated to be 490 μm 2 per fuse set by using a 5 μm diameter TSV process. Most importantly, the yield improvement of a two-die stacked memory can be over 50% with yield excursion reduced to 8%.
    其他題名: TCSI
    出版者: New York: IEEE
    出版日期: 2013-09-01
    出處: IEEE transactions on circuits and systems. I, Regular papers, 2013-09, Vol.60 (9), p.2343-2351
    資源來源: IEEE Electronic Library (IEL)
    版權: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Sep 2013
    識別號: ISSN: 1549-8328
    識別號: EISSN: 1558-0806
    識別號: DOI: 10.1109/TCSI.2013.2246235
    識別號: CODEN: ITCSCH
    Appears in Collections:[Graduate Institute of History ] journal & Dissertation

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