印刷電路板組裝之表面黏著機之電子元件取置作業規劃; Operation planning of Collect and place machines in PCB assembly

NCUIR > School of Management at National Central University > Graduate Institute of Industrial Management > Electronic Thesis & Dissertation > Item 987654321/11279

Please use this identifier to cite or link to this item: https://ir.lib.ncu.edu.tw/handle/987654321/11279

Title:	印刷電路板組裝之表面黏著機之電子元件取置作業規劃;Operation planning of Collect and place machines in PCB assembly
Authors:	賴彥璋;Yen-chang Lai
Contributors:	工業管理研究所
Keywords:	印刷電路板;表面黏著機;Surface Mount Technology;Surface Mount Device placement machine;Printed Circuit Board
Date:	2007-07-02
Issue Date:	2009-09-22 14:18:02 (UTC+8)
Publisher:	國立中央大學圖書館
Abstract:	表面黏著技術(Surface Mount Technology；SMT)是屬於印刷電路板組裝(Printed Circuit Board Assembly；PCBA)製造流程中封裝作業的核心技術，而表面黏著機(Surface Mount Device)能夠把體積較小且重量較輕的電子元件精準的放置在印刷電路板的位置上，在整個表面黏著製程中就屬表面黏著機的取置作業所耗費的時間最，該機械會受到元件供料的位置、取置機抓取元件順序與放置元件順序的安排不當，而影響電路板組裝時間。我們希望藉由有效率的規劃表面黏著機(取置機)的電子元件取置作業，使取置機的平均完成時間越小越好。吾人將表面黏著機的規劃方式分成兩個子問題，第一個問題是要決定用來裝載元件供料器，而求解此問題時得先決定要用何種標準去安排供料器的位置，吾人是以元件彼此之間距離上的相關性做評判之後再決訂供料器的指派，而第二個子問題是要決定取置頭的元件取置作業順序，由於這兩個子問題之間有著高度依賴性，因此吾人在決定供料器的位置時也會同時顧及到取置頭潛在可能的取置作業順序，而本研究希望針對各子問題發展有效的演算法，在各種不同的PCB 類型下找出最有效率的演算法，吾人期望以達到整個印刷電路板平均組裝週期時間最小化的目的。 The Surface mount technology is the core of the PCB assembly. The surface mount device placement machine can put the component on the PCB speedy and precise. In the whole PCB assembly process, the operation of the placement machine is the bottleneck. A good scheduling the operations of Collect-and-place machine can cut down the PCB assembly cycle time effectively. We propose a series of heuristics to solve the feeder assignment problem. Based on the location of the feeder in the magazine, the component placement sequence is determined. When both of the problems are determined, we propose a simulated annealing heuristic to improve the order of the placement tours. Finally, we compare the performance of the heuristics to the lower bound value which is introduced by Grunow et al.(2004).Numerical experiments show that our heuristic can reduce the PCB assembly cycle time conspicuously, and the simulated annealing heuristic can also improve the PCB cycle time.The series of the heuristics compare slightly deviation with the lower bound value.
Appears in Collections:	[Graduate Institute of Industrial Management] Electronic Thesis & Dissertation

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