TRAFFIC MANAGEMENT CIRCUIT FOR THE SHARED BUFFER MEMORY SWITCH WITH MULTICASTING

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > journal & Dissertation > Item 987654321/29458

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/29458

Title:	TRAFFIC MANAGEMENT CIRCUIT FOR THE SHARED BUFFER MEMORY SWITCH WITH MULTICASTING
Authors:	WU,JS;KUO,FJ
Contributors:	電機工程研究所
Date:	1993
Issue Date:	2010-06-29 20:25:14 (UTC+8)
Publisher:	中央大學
Abstract:	The shared buffer memory switch has some merits such as higher bandwidth utilization and lower buffer size. It can also be modified to perform multicasting, but the multicasting cells have a higher priority to be switched. The traffic management circuit (TMC) we propose in this paper can solve this unfair problem by properly allocating the throughputs of both multicasting and general cells. The formulae for setting the control parameter in TMC are also derived.
Relation:	COMPUTER COMMUNICATIONS
Appears in Collections:	[Graduate Institute of Electrical Engineering] journal & Dissertation

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