中大機構典藏-NCU Institutional Repository-提供博碩士論文、考古題、期刊論文、研究計畫等下載:Item 987654321/48483
English  |  正體中文  |  简体中文  |  Items with full text/Total items : 80990/80990 (100%)
Visitors : 41919704      Online Users : 2473
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version


    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/48483


    Title: 含高速化排序架構之天線組態可變的多輸入輸出解碼器設計;Design of Antenna-Configurable MIMO Detector with High Speed Sorting Architectures
    Authors: 黃宣貴;Hsuan-Kuei Huang
    Contributors: 電機工程研究所
    Keywords: 改良型K最佳演算法;排序法;多輸入輸出解碼器;MIMO;K-Best;MKB;Sorting Algorithm
    Date: 2011-07-25
    Issue Date: 2012-01-05 14:56:02 (UTC+8)
    Abstract: 在此論文裡,我們提出了可適用於6×6、5×5、4×4、3×3 和2×2不同的天線組態,以及可支援64-QAM、16-QAM、QPSK和BPSK不同的調變方法且K值10的K最佳多輸入輸出解碼器。我們設計了改良型K最佳演算法(Modified K-best, 以下簡稱MKB)來取代傳統K最佳演算法每層都需要排序的特色,改為每兩層排序一次減少排序的次數,為了進一步減少拜訪的點數又設計了新式的編碼式列舉法(Code-Book Enumeration, 以下簡稱CBE)將拜訪節點由K×√M減少為K×e,針對排序效率的提升設計了新式的排序方法平行切割合併法(Parallel-Slice Merge Algorithm, 以下簡稱PSMA)和平行氣泡切割排序法(Parallel Bubble-Slice Sort, 以下簡稱PBSS)來加快排序的速度。在硬體的實現上,我們利用MKB與排序電路的組合方塊來達到管線式架構可配置的需求。為了減少乘法器的複雜度,我們使用移位乘法器(Shift Multiplier, SM)來取代傳統的乘法器。本論文使用SMIMS VeriEnterprise Xilinx FPGA驗證電路功能,並以Design Compiler 與UMC Faraday 90μm製程合成與其他文獻作比較。 In this thesis, we proposed a MIMO detector which can support multiple antenna types (6×6, 5×5, 4×4, 3×3, and 2×2), various modulation schemes (64-QAM, 16-QAM, QPSK, and BPSK) and K-value (K=10). From the algorithm aspects, we deigned a modified K-best algorithm (MKB) can reduce the number of sorting layer from 2Nt to Nt, compared with the conventional K-best algorithm. The MKB also include the Code-Book Enumeration to reduce number of visted nodes from K×√(M ) to K×e.To further enhance sorting performance, we design the Paralled-Slice Merge algorithm(PSMA) and Parallel Bubble-Slice sort(PBSS). In terms of hardware implementation, the MKB and sorting circuit are designed as elementary building blocks. With these building blocks, the proposed MIMO detector can flexibly achieve the configurable architecture. In order to simplify the multiplier complexity, we propose a novel shift-multiplier (SM) to replace the conventional multiplier. Finally, the proposed configurable MIMO detector is verified by the SIMIS VeriEnterprise Xilinx FPGA development board.
    Appears in Collections:[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

    Files in This Item:

    File Description SizeFormat
    index.html0KbHTML481View/Open


    All items in NCUIR are protected by copyright, with all rights reserved.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明