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    題名: A Broadband High Efficiency High Output Power Frequency Doubler
    作者: Chang,HY;Chen,GY;Hsin,YM
    貢獻者: 電機工程學系
    關鍵詞: DISTRIBUTED DOUBLER;PHEMT;TECHNOLOGY;LINE
    日期: 2010
    上傳時間: 2012-03-28 10:09:48 (UTC+8)
    出版者: 國立中央大學
    摘要: An 8 to 30 GHz broadband high efficiency, high output power frequency doubler using 0.5 mu m AlGaAs/InGaAs enhancement-mode pseudomorphic high electronic mobility transistor process is presented in this paper. A common-gate/common-source field effect transistor pair is employed in the balanced doubler. With an input power of 8 dBm, this work features a conversion gain of better than -4 dB with a fundamental rejection of better than 13 dB over the operation bandwidth. The output 1 dB compression point (P(1 dB)) and the saturation output power (P(sat)) are higher than 7.3 and 10 dBm, respectively. This work presents the highest figure-of-merit (FOM) of 25.14 as compared to other previously reported broadband doublers.
    關聯: IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS
    顯示於類別:[電機工程學系] 期刊論文

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