English  |  正體中文  |  简体中文  |  全文笔数/总笔数 : 80990/80990 (100%)
造访人次 : 41628620      在线人数 : 3211
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
搜寻范围 查询小技巧:
  • 您可在西文检索词汇前后加上"双引号",以获取较精准的检索结果
  • 若欲以作者姓名搜寻,建议至进阶搜寻限定作者字段,可获得较完整数据
  • 进阶搜寻


    jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/52014


    题名: A 6-GHz Built-in Jitter Measurement Circuit Using Multiphase Sampler
    作者: Cheng,KH;Liu,JC;Huang,HY;Li,YL;Jhu,YJ
    贡献者: 電機工程學系
    日期: 2011
    上传时间: 2012-03-28 10:13:19 (UTC+8)
    出版者: 國立中央大學
    摘要: This brief presents a 6-GHz built-in jitter measurement (BIJM) with the time amplifier (TA) and the multiphase sampler (MPS) to achieve a 1-ps timing resolution. The proposed MPS can reduce the area, and the TA can extend the total timing resolution of BIJM. The self-referenced circuit with the autocalibration technique can eliminate the process variations and create a reference clock being a sampled signal. Using the calibration technique, the gain variation of TA and the timing resolution variation of MPS can be aligned to achieve a 1-ps timing resolution. The sense amplifier delay flip-flop uses the bulk input to reduce the measured error. The BIJM is fabricated by a 90-nm CMOS process. The core area of BIJM is 130 mu m x 200 mu m, and the power consumption is 20.4 mW with the I/O buffers.
    關聯: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
    显示于类别:[電機工程學系] 期刊論文

    文件中的档案:

    档案 描述 大小格式浏览次数
    index.html0KbHTML646检视/开启


    在NCUIR中所有的数据项都受到原著作权保护.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明