An SSVEP-Based BCI Using High Duty-Cycle Visual Flicker

NCU Institutional Repository > 資訊電機學院 > 電機工程學系 > 期刊論文 > Item 987654321/52033

請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/52033

題名:	An SSVEP-Based BCI Using High Duty-Cycle Visual Flicker
作者:	Lee,PL;Yeh,CL;Cheng,JYS;Yang,CY;Lan,GY
貢獻者:	電機工程學系
關鍵詞:	BRAIN-COMPUTER INTERFACE;FREQUENCY;COMMUNICATION;STIMULATION;TOPOGRAPHY
日期:	2011
上傳時間:	2012-03-28 10:13:46 (UTC+8)
出版者:	國立中央大學
摘要:	Steady-state visual-evoked potential (SSVEP)-based brain-computer interfaces (BCIs) have generated significant interest due to their high information transfer rate (ITR). Due to the amplitude-frequency characteristic of the SSVEP, the flickering frequency of an SSVEP-based BCI is typically lower than 20 Hz to achieve a high SNR. However, a visual flicker with a flashing frequency below the critical flicker-fusion frequency often makes subjects feel flicker jerky and causes visual discomfort. This study presents a novel technique using high duty-cycle visual flicker to decrease user's visual discomfort. The proposed design uses LEDs flashing at 13.16 Hz, driven by flickering sequences consisting of repetitive stimulus cycles with a duration T (T = 76 ms). Each stimulus cycle included an ON state with a duration T(ON) and an OFF state with a duration T(OFF) (T = T(ON) + T(OFF)), and the duty cycle, defined as T(ON)/T, varied from 10.5% to 89.5%. This study also includes a questionnaire survey and analyzes the SSVEPs induced by different duty-cycle flickers. An 89.5% duty-cycle flicker, reported as a comfortable flicker, was adopted in a phase-tagged SSVEP system. Six subjects were asked to sequentially input a sequence of cursor commands with the 25.08-bits/min ITR.
關聯:	IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING
顯示於類別:	[電機工程學系] 期刊論文

文件中的檔案:

檔案	描述	大小	格式	瀏覽次數
index.html		0Kb	HTML	615	檢視/開啟

在NCUIR中所有的資料項目都受到原著作權保護.

社群 sharing

資料載入中.....