Low Phase Noise and Low Power Consumption VCOs Using CMOS and IPD Technologies

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Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/52083

Title:	Low Phase Noise and Low Power Consumption VCOs Using CMOS and IPD Technologies
Authors:	Hsu,YC;Chiou,HK;Chen,HK;Lin,TY;Chang,DC;Juang,YZ
Contributors:	電機工程學系
Keywords:	FABRICATION;INDUCTORS;DESIGN
Date:	2011
Issue Date:	2012-03-28 10:15:02 (UTC+8)
Publisher:	國立中央大學
Abstract:	This paper presents two voltage controlled oscillators (VCOs) operating at 5.42 and 5.76 GHz implemented in 0.18-mu m complementary metal-oxide semiconductor (CMOS) technology with integrated passive device (IPD) inductors. One IPD inductor was stacked on the top of the active region of the 5.76-GHz VCO chip, whereas the other IPD inductor was placed on the top of the 5.42-GHz VCO CMOS chip but far from the its active region. The high-quality IPD inductors reduce the phase noise of the VCOs. The measurements of the two VCOs indicate the same phase noise of -120 dBc/Hz at 1 MHz offset frequency. These results demonstrate a 6-dB improvement compared to the VCO using an on-chip inductor. This paper also presents the effect of the coupling between the IPD inductor and the active region of the chip on the phase noise performance.
Relation:	IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY
Appears in Collections:	[Department of Electrical Engineering] journal & Dissertation

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