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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/53180


    Title: 微波及毫米波注入式除頻器與振盪器暨射頻前端應用;Microwave and Millimeter-Wave Injection-Locked Frequency Divider, Oscillator and the RF Front-end Applications
    Authors: 黃致勝;Chih-sheng Huang
    Contributors: 電機工程研究所
    Keywords: 注入鎖定;鎖相迴路;射頻前端積體電路;Injection-Locked;Phase-Locked Loop (PLL);RF Front-end integrated circuits
    Date: 2012-01-12
    Issue Date: 2012-06-15 20:23:40 (UTC+8)
    Abstract: 隨著無線通訊快速的發展,許多系統已廣泛應用在微波與毫米波頻段上。為了提供系統穩定且低相位雜訊之本地振盪源,注入鎖定技術已逐漸應用於振盪器、除頻器、鎖相迴路與倍頻器等主動電路。本論文研究方向著重於使用注入鎖定技術之本地振盪源組件以應用於24 GHz汽車雷達系統之前端收發積體電路。論文內容主要分為三部分:第二章與第三章為第一部分,分別闡述應用於鎖相迴路中的注入鎖定除頻器及其鎖相迴路應用。第四章為第二部分,主要為注入鎖定振盪器的設計與分析。最後,第五章則是呈現一個應用於24 GHz雷達收發系統的前端電路。 第二章介紹各類除頻器架構以及設計原理,同時採用台積電提供的0.18 μm 互補式金氧半場效電晶體製程(TSMC 0.18 μm CMOS)實現一個除五注入鎖定除頻器,量測最大鎖定頻寬為3.84 GHz。第三章是將第二章所提出之除頻器整合至鎖相迴路系統,包含壓控振盪器(VCO)、相位頻率偵測器(PFD:Phase Frequency Dector)、電荷幫浦(CP:Charge Pump)、迴路濾波器(Loop Filter)及除頻鏈(divider chain),同樣是使用TSMC 0.18 μm CMOS製程實現,其鎖定範圍為21.29~21.88 GHz,且輸出功率皆大於0 dBm。當輸出頻率為21.88 GHz時,在偏移中心頻1 MHz量測之輸出相位雜訊為−101.4 dBc/Hz。 第四章為注入鎖定振盪器的設計與分析,並使用台積電提供的90 nm 互補式金氧半場效電晶體製程(TSMC 90 nm CMOS)實作一個鎖定頻寬有20.4 GHz的W頻段注入鎖定振盪器,其輸出功率平坦度為2 dB。最高輸出頻率為108 GHz。第五章是採用WIN 0.5 μm E/D-PHEMT製程來實現測速與測距雷達系統之前端收發積體電路。此雷達系統包括低雜訊放大器(LNA)、混波器(Mixer)、緩衝放大器(Buffer amplifier)、壓控振盪器(VCO)及功率放大器(PA)。In order to provide system with a stable and low phase noise local oscillator (LO) for the microwave and millimeter wave (MMW) system, an injection-locked technique is widely used in active circuits, such as oscillator, frequency divider, phase-locked loop (PLL), and frequency multiplier. The aim of this dissertation is to develop the components in the LO by using the injection-locked technique and the radio frequency (RF) front-end integrated circuits (ICs) of a 24-GHz automotive radar applications. The dissertation is mainly divided into three parts. Chapter 2 and Chapter 3 constitute the first part and present a K-band injection-locked frequency divider (ILFD) and its PLL application, respectively. The second part is Chapter 4, and the design and analysis of the injection-locked tripler is presented. Finally, Chapter 5 presents the development of the 24 GHz RF front-end transceiver. The analysis and design of the ILFD are introduced in Chapter 2. The divide-by-5 ILFD with a locking range of 3.84 GHz is fabricated using TSMC 0.18 μm CMOS process. Moreover, the proposed ILFD is applied to a fully integrated PLL, and the simulated and measured results are presented in Chapter 3. The frequency of PLL is from 21.29 to 21.88 GHz and the output power is higher than 0 dBm. The measured output phase noise is −101.4 dBc/Hz at 1 MHz offset, while the output frequency is 21.88 GHz. The design and analysis of an injection-locked oscillator (ILO) is presented in Chapter 4. The ILO with a locking range of 20.4 GHz and an output power flatness of 2 dB is realized using TSMC 90 nm CMOS process. The maximum output frequency is 108 GHz. The implementations of the front-end ICs for the 24 GHz automotive radar applications are designed using WIN 0.5 μm E/D-PHEMT. The RF transceiver consists of a low noise amplifier, a mixer, a buffer amplifier, a voltage control oscillator, and a power amplifier.
    Appears in Collections:[電機工程研究所] 博碩士論文

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