藉由這個系統，我們可以製造出點狀陣列，並且用拉曼和原子力顯微鏡測量。這兩種量測都指出這些點狀的缺陷是平均直徑為160nm的孔。而另一方面，藉由調變輸出阻抗而控制的最大電流。我們可以製造出環狀圖案。這明確的指出這些點狀的孔是由充電過程中過大的電流產生的，而少了這個過大的充電電流，環形圖案則是由電壓引起的電解而產生的。綜以上所述，點狀和環狀圖案表示充電過程中電流主導和電壓主導階段。 ;Graphene has attracted attention in recent years because of low dimensional and high electron mobility. However, the gap-less feature is the main obstacle to further electronic application. Defect generation is one way to manipulate the band gap of graphene. To create defect on graphene, Scanning probe lithography (SPL) is a well-developed nano-meter scale technique. In our previous work, we formed graphene oxidation through negative bias SPL. However, the mechanism of the oxidation processing with SPL is still unveiled. To understand this, we set up a pulsed SPL system with precise pulse width, pulse treatment position control and the output impedance control. After point-like arrays are generated by pulsed SPL, both Raman and atomic force microscopy (AFM) measurements conclude that those defects are holes in average diameter 160 nm on graphene. In the limit of maximum current, ring-like patterns are generated. It indicates that the point-like holes are created by large charging current and that the ring patterns are caused by electrolysis which is driven by voltage. In summary, the point-like and ring-like patterns represent current dominant and voltage dominant phase in the charging process.
