本論文研究主題為氮化鋁銦/氮化鋁/氮化鎵(AlInN/AlN/GaN)高電子遷移率電晶體(high electron mobility transistor, HEMT)之製作與高頻特性分析。在元件製作方面，我們製作了閘極長度為0.4 μm之Schottky gate HEMTs。其汲極電流(Idss)可達713 mA/mm，最大轉導(gm,max)可達300 mS/mm，元件崩潰電壓最高可達117 V。在Lg= 0.4 μm，Lgs= 1 μm，Lgd= 2 μm HEMT上，所量得的電流增益截止頻率(fT)可達48.9 GHz，功率增益截止頻率(fmax)可達57.3 GHz，此高頻特性與國際上其他團隊最佳之結果相當。 此論文亦包括建立一個準確之小訊號電路模型之研究成果。我們根據磊晶片各層厚度、介電常數以及元件佈局這三項因素，建立新型的Cold FET外部電容模型，使小訊號電路參數的萃取更符合元件本身的情況，且使得模擬與實際量測的結果更為匹配。此方法亦應用於比較以三甲基鎵與三乙基鎵所成長之元件特性差異。 ;This thesis aims at fabrication and characterization of high frequency characterisitcs of AlInN/AlN/GaN high electron mobility transistors (HEMTs). In this work, 0.4 μm Schottky-gate HEMTs have been fabricated on epiwafers grown by metal-organic chemical vapor deposition on Si substrates. The devices exhibit Idss of 713 mA/mm, peak transconductance of 300 mS/mm, and breakdown voltage of 117 V. High frequency measurements indicate that the devices have current gain cut-off frequency of 48.9 GHz and power gain cut-off frequency of 57.3 GHz. These results are comparable or better than the best reported results in the literature. We have also constructed a small signal circuit model for the devices fabricated on epiwafers grown by trimethylgallium (TMG) and triethylgallium (TEG). Based on the thickness of the epitaxial layers, dielectric constant and device layout, a new cold FET model is established for parasitic capacitance. This helps to accurately extract the small signal circuit parameters of the devices as indicated by the good match between the simulated and measured results. This parameter extraction method has been used to compare the difference between devices grown by TMG and TEG.
