| 摘要: | 本研究計畫將開發毫米波頻段目標偵測主被動前端收發機高整合積體電路，實現的方法是使用90nm和40nm金氧半場效應電晶體積體電路技術。操作頻率以Ka頻段為主，W頻段為輔。發射射頻功率可超過12dBm以上，接收轉換增益大於20dB，雜訊指數小於8dB。在主動偵測模態操作下，發射週期性脈衝毫米波載波，接收機接收回波信號用以估計目標物離和速度；在被動偵測模態操作下，接收機接收目標物背景輻射訊號。在第一年研究工作，已完成前端收發機關鍵電路設計，如切換器、功率放大器、低雜訊放大器、混波器、功率偵測器、寬頻放大器、壓控振盪器及除頻器。在第二年研究工作，將進一步修正前端收發機系統設計、並進行高整合毫米波積體電路設計和構裝技術開發。並將相關積體電路整合於毫米波頻段目標偵測主被動系統上，降低成本，改善電路性能。預期可得到成果為毫米波積體電路相關技術建立、參與研究計畫之人員培育、創新之積體電路開發研究、相關量測技術發展及高整合前端收發機晶片之相關技術研究。執行期間，工作項目將包含系統規劃、電路設計及佈局、晶片製作與評估。將研製前端收發機關鍵積體電路，設計及佈局將完成並送至代工廠製作。最後，完成量測分析。 ;This project will develop the RF-frontend highly integrated circuits for the millimeter-wave active and passive target detection, and the circuits will be implemented using a few advanced 90nm and 40 nm CMOS processes. The main and auxiliary frequency windows are Ka and W-band, respectively. The maximum RF output power of the transmitter is higher than 12 dBm. The receiver has a conversion gain of higher than 20 dB and a noise figure of lower than 8 dB. For the active detection, the periodically pulsed carrier signal is transmitted, and the returned RF signal is received to estimate the distance and velocity between the target and the detector. For the passive detection, only the receiver will be operated to receive the background radiation of the target in the millimeter-wave band. In the first year, we have developed several key components, including switch, power amplifier, low noise amplifier, mixer, power detector, broadband amplifier, voltage controlled oscillator, and frequency divider. In the second year, the RF-frontend system will be properly modified based on some simulation, and the millimeter-wave highly integrated circuits (ICs), and the package technology will also continuously developed. The developed circuits will be integrated in the active and passive RF-frontend transceiver to further reduce the cost and enhance the performance. We will achieve the establishment of the millimeter-wave IC technology, the innovative ICs, the related measurement technology, and the high-integrated transceiver. The system planning, IC design, chip layout, fabrication and chip evaluation will be exercised. The design will also be completed and sent to the foundry for fabrication. Final, the measurement and analysis of the developed ICs will be carried out. |
