研發應用於下世代Beyond Gigabit 乙太網路傳收機之深度學習技術 (IC設計)( I );Develop Deep Learning Techniques for Next Generation beyond Gigabit Ethernet Transceiver( I )

NCUIR > College of Electrical Engineering & Computer Science > Department of Electrical Engineering > Research Project > Item 987654321/84719

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/84719

Title:	研發應用於下世代Beyond Gigabit 乙太網路傳收機之深度學習技術 (IC設計)( I );Develop Deep Learning Techniques for Next Generation beyond Gigabit Ethernet Transceiver( I )
Authors:	薛木添
Contributors:	電機工程學系
Keywords:	脈衝振幅調變;Tomlinson-Harashima預編碼器;等化器;回音消除器;近端串音消除器;深度學習;混合電路;粒子群最佳化;Pulse Amplitude Modulation;Tomlinson-Harashima Precoder;Equalizer;Echo Canceller;NEXT Canceller;Deep Learning;hybrid-circuit;Particle Swarm Optimization
Date:	2020-12-08
Issue Date:	2020-12-09 10:47:04 (UTC+8)
Publisher:	科技部
Abstract:	隨著網路速度的提升，數據傳輸的信號頻寬因而跟著必須提高，為了克服既有乙太網路所使用的銅雙絞線的頻寬限制，IEEE Std 802.3bz™-2016 (2.5GBASE-T & 5GBASE-T)及10GBASE-T 均採用更高的PAM16 (16-level Pulse Amplitude Modulation) 及導入 Low-Density Parity-Check (LDPC)編碼技術及Tomlinson-Harashima Precoder (THP) 技術。然而，THP可避免Decision-Feedback Equalizer (DFE) 之錯誤傳播(error propagation)，但是必須付出更高的電路晶片實現成本，這是因為PAM16資料信號經過THP之輸出信號已是近似連續信號。在類比電路方面，除了電路頻寬的提升，線性度及DAC/ADC (數位類比轉換/類比數位轉換)的要求因而大幅提高了。在數位電路方面，除了因為數據傳輸速率提高而必須擴展信號頻寬及提高數位電路的操作速度，更因為導入THP技術而大幅提高回音消除器及Near-End Crosstalk (NEXT)電路複雜度。此外，隨著信號頻寬的擴展，射頻干擾涵蓋的RFI頻譜範圍也增加了。本計畫之目標乃是研究將深度學習技術應用於下世代beyond Gigabit乙太網路PHY transceiver 之相關議題或模組，譬如將adaptive Particle Swarm Optimization (PSO)演算法應用THP-based adaptive equalizer、IIR-based digital echo/NEXT canceller、analog echo/NEXT canceller、adaptive hybrid-circuit 及窄頻RFI cancellation/suppression，並且將研發之演算法應用於IEEE Std 802.3bz™-2016 下世代Multi-Gigabit 乙太網路PHY transceiver設計。 ;As the speed of the network increases, the signal bandwidth of the data transmission must be increased. In order to overcome the bandwidth limitation of the copper twisted pair used in the existing Ethernet, IEEE Std 802.3bzTM-2016 (2.5GBASE- Both T & 5GBASE-T) and 10GBASE-T use the higher PAM16 (16-level Pulse Amplitude Modulation) and employ Low-Density Parity-Check (LDPC) encoding technology and Tomlinson-Harashima Precoder (THP) technology. However, THP avoids the error propagation of the Decision-Feedback Equalizer (DFE), but it must pay a higher cost of circuit chip implementation because the output signal of the PAM16 data signal through the THP is already an approximate continuous signal. In addition to the increase in analog circuit bandwidth, linearity and DAC/ADC (digital analog conversion / analog digital conversion) requirements have been greatly improved. In addition to and the increase in the operating speed of digital circuits due to the increase in signal bandwidth, the introduction of THP technology has greatly increased the complexity of echo cancellers and Near-End Crosstalk (NEXT) circuits. In addition, as the signal bandwidth expands, the RFI spectrum range covered by RF interference also increases. The goal of this project is to study the application of deep learning techniques to next-generation beyond Gigabit Ethernet PHY transceivers, such as the application of adaptive particle Swarm Optimization (PSO) algorithms to THP-based adaptive equalizers, IIR-based digital echo/NEXT cancellers, analog echo/NEXT cancellers, adaptive hybrid-circuit, and narrowband RFI cancellation/suppression, and apply the developed algorithm to IEEE Std 802.3bzTM-2016 next generation Multi-Gigabit Ethernet PHY transceiver design.
Relation:	財團法人國家實驗研究院科技政策研究與資訊中心
Appears in Collections:	[Department of Electrical Engineering] Research Project

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