應用於寬頻劃碼多工進接及雙頻無線區域網路之射頻收發機研製; The Design and Implementation of Radio Frequency Transceiver for WB-CDMA and Dual-band WLAN Applications

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題名:	應用於寬頻劃碼多工進接及雙頻無線區域網路之射頻收發機研製;The Design and Implementation of Radio Frequency Transceiver for WB-CDMA and Dual-band WLAN Applications
作者:	林正杰;Cheng-Chieh Lin
貢獻者:	電機工程研究所
關鍵詞:	寬頻劃碼多工進接;雙頻三模無線區域網路;射頻收發機;矽鍺雙載子互補金屬氧化半導體製程;WB-CDMA;RF Transceiver;Dual-band Three mode WLAN;SiGe BiCMOS process
日期:	2004-07-07
上傳時間:	2009-09-22 11:53:25 (UTC+8)
出版者:	國立中央大學圖書館
摘要:	摘要此篇論文中敘述了各種射頻收發機之電路設計，分別應用於寬頻劃碼多工進接與雙頻三模無線區域網路，採用台積電0.35 ?m矽鍺雙載子互補金屬氧化半導體製程。以下依各章節不同的收發機架構與應用來分類，概述論文中各電路的實際量測結果。第二章為寬頻劃碼多工進接之超外差式接收機設計，包含了1.95 GHz低雜訊放大器設計與1.95 GHz混頻器設計。低雜訊放大器約有20 dB的增益、大於10 dB的輸出?入回返損耗、輸入1-dB增益壓縮點為-29.5 dBm、輸入三階截斷點在-16 dBm。混頻器約有5.4 dB的轉換損失、輸入1-dB增益壓縮點為-3.5 dBm、輸入三階截斷點在8.5 dBm、中頻頻寬為500 MHz、射頻埠和本地振盪源埠之間的隔離度均大於30 dB。第三章為雙頻三模無線區域網路之直接降頻接收機設計，包含了2.4/5.2/5.8 GHz低雜訊放大器設計與2.4/5.2/5.8 GHz次諧波混頻器設計。雙頻三模之低雜訊放大器在三個不同的操作頻率下，均具有大於15 dB的增益、大於10 dB的輸出?入回返損耗、大於-24 dBm的輸入1-dB增益壓縮點、大於-9 dBm的輸入三階截斷點。雙頻三模之次諧波混頻器在三個不同的操作頻率下，均提供了大於-5 dB的轉換增益、大於-2 dBm的輸入1-dB增益壓縮點、大於3 dBm的輸入三階截斷點、大於30 dBm的輸入二階截斷點、大於50 MHz的中頻頻寬、射頻埠和本地振盪源埠之間的隔離度均大於35 dB。第四章為寬頻劃碼多工進接之直接降頻收發機設計，包含了2.15 GHz全對稱可變增益直接降頻接收機設計、三個1.95GHz高平均功率增進效率功率放大器設計與2.15 GHz四相位考畢茲壓控振盪器設計。直接降頻接收機具有大於20 dB的增益、大於7.5 dB的輸入回返損耗、12 dB的增益調整範圍、-29 dBm的輸入1-dB增益壓縮點。三種不同架構的高平均功率增進效率功率放大器設計分別為：適應性偏壓功率放大器、適應性偏壓多帝功率放大器以及適應性偏壓四路延伸多帝功率放大器。適應性偏壓功率放大器具有13.5 dB的增益、大於10 dB的輸出?入回返損耗、13.6 dBm的輸出1-dB增益壓縮點、19 dBm的輸出三階截斷點、38 %的最大功率增進效率。適應性偏壓多帝功率放大器具有7 dB的增益、大於10 dB的輸出?入回返損耗、16.5 dBm的輸出1-dB增益壓縮點、14.8 dBm的輸出三階截斷點、27 %的最大功率增進效率。適應性偏壓四路延伸多帝功率放大器具有5 dB的增益、大於10 dB的輸出?入回返損耗、16.5 dBm的輸出1-dB增益壓縮點、23.6 dBm的輸出三階截斷點、22 %的最大功率增進效率。若以適應性偏壓功率放大器的平均功率增進效率為基準，則適應性偏壓多帝功率放大器與適應性偏壓四路延伸多帝功率放大器對於平均功率增進效率的改善分別為243 %與317 %。最後，四相位考畢茲壓控振盪器約有160 MHz的振盪頻率調整範圍、48.5 MHz/V的控制增益、約-10 dBm的輸出功率強度、在與振盪頻率距100 kHz頻偏的量測條件下約-85 dBc/Hz的相位雜訊。 Abstract The thesis describes various circuit designs in radio frequency transceiver for WB-CDMA and dual-band WLAN applications those are implemented in tsmc 0.35?m SiGe BiCMOS technology. Chapter one gives a brief description of the device technologies and the contents of each following chapters. Chapter two reports a super-heterodyne receiver design for WB-CDMA applications, which contains a 1.95 GHz low noise amplifier design and a 1.95 GHz mixer design. The LNA provides approximately 20 dB gain with input/output return loss better than 10 dB, and has input P1dB of -29.5 dBm, input IP3 of -16 dBm. The mixer achieves 5.4 dB conversion loss, and has input P1dB of -3.5 dBm, input IP3 of 8.5 dBm, IF bandwidth of 500 MHz, and the isolations between RF port and LO port are better than 30 dB without except. Chapter three reports a direct conversion receiver design for dual-band three-mode WLAN application, which contains a 2.4/5.2/5.8 GHz low noise amplifier design and a 2.4/5.2/5.8 GHz sub-harmonic mixer (SHMIX) design. In three diverse operation frequencies, the dual-band three-mode LNA provides better than those properties below without except, that are 15 dB gain with input/output return loss better than 10 dB, and has input P1dB of -24 dBm, input IP3 of -9 dBm. The dual-band three-mode SHMIX in all of the operation frequencies also achieves better than -5 dB conversion gain, and has input P1dB of -2 dBm, input IP3 of 3 dBm, IF bandwidth of 50 MHz, and the isolations among all ports are better than 35 dB. Chapter four reports a direct conversion transceiver design for WB-CDMA application, which contains a 2.15 GHz fully differential variable gain direct conversion receiver (DCR) design, three 1.95 GHz high average power added efficiency (PAEAverage) power amplifier designs, and a 2.15 GHz quadrature phase Colpitts voltage controlled oscillator (QVCO) design. The DCR provides more than 20 dB gain with input return loss better than 7.5 dB, and has input P1dB of -29 dBm, gain controlled range of 12 dB. Three different circuit architectures are high PAEAverage PA designs are adaptive bias PA (A-PA), adaptive bias Doherty PA (AD-PA), and adaptive bias extended Doherty PA (AED-PA), respectively. The A-PA provides 13.5 dB gain with input/output return loss better than 10 dB, and has output P1dB of 13.6 dBm, output IP3 of 19 dBm, the maximum PAE of 38 %. The AD-PA provides 7 dB gain with input/output return loss better than 10 dB, and has output P1dB of 16.5 dBm, output IP3 of 14.8 dBm, the maximum PAE of 27 %. The four-way AED-PA provides 5 dB gain with input/output return loss better than 10 dB, and has output P1dB of 16.5 dBm, output IP3 of 23.6 dBm, the maximum PAE of 22 %. In contrast to the A-PA, the PAEAverage of AD-PA and four-way AED-PA have remarkably been improved of 243% and 317%, respectively. Finally, the QVCO has tuning range of 160 MHz with tuning gain of 48.5 MHz/V, output power of -10 dBm, and the phase noise approximate at -85 dBc/Hz on 100 kHz offset frequency.
顯示於類別:	[電機工程研究所] 博碩士論文

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