以RFSoC平台設計與實現DVB-S2多重符碼率收發機;Design and Implementation of DVB-S2 Multi-Symbol Rate Transceiver with RFSoC Platform

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题名:	以RFSoC平台設計與實現DVB-S2多重符碼率收發機;Design and Implementation of DVB-S2 Multi-Symbol Rate Transceiver with RFSoC Platform
作者:	林宇蓁;Lin, Yu-Chen
贡献者:	通訊工程學系
关键词:	第二代數位衛星廣播;多重符碼率;升取;降取;多相濾波器;費洛內插器;數位訊號處理;軟體定義無線電;射頻系統晶片;現場可程式化邏輯閘陣列;DVB-S2;Multi-Symbol Rate;Up-Sampling;Down-Sampling;Polyphase Filter;Farrow Interpolator;Digital Signal Processing;Software Defined Radio;RFSoC;FPGA
日期:	2025-04-11
上传时间:	2025-10-17 12:16:33 (UTC+8)
出版者:	國立中央大學
摘要:	隨著低軌道（Low Earth Orbit, LEO）衛星通訊技術的發展，第二代數位衛星廣播系統DVB-S2成為不可或缺的標準，此標準具有優秀的錯誤修正能力與高頻譜效率，整體系統於低訊雜比(Signal to Noise Ratio, SNR)的環境下仍能運作。本研究針對DVB-S2標準在衛星通訊中的應用，設計並實現支援多重符碼率(Multi-Symbol Rate)的收發機，旨在不調整系統取樣率的情況下，以數位訊號處裡的方式，使用多級的兩倍多相濾波器搭配小數倍率降取的費洛內插器(Farrow Interpolator)，實現可變的升取及降取濾波器，使其可進行任意符碼率的調整，達到連續可變符碼率收發機的效果，而透過降低符碼率連帶降低頻寬消耗並提升靈敏度來增強衛星通訊的可靠度。;With the advancement of Low Earth Orbit (LEO) satellite communication technology, the Digital Video Broadcasting - Satellite - Second Generation (DVB-S2) has become an essential standard. This standard features excellent error correction capabilities and high spectral efficiency, allowing the system to operate even in low Signal-to-Noise Ratio (SNR) environments. This thesis focuses on the application of the DVB-S2 standard in satellite communication by designing and implementing a multi-symbol rate transceiver. Without adjusting the system sampling rate, we employ digital signal processing techniques, utilizing multi-stage two-times polyphase filters combined with a fractional-rate decimating Farrow Interpolator to implement variable up-sampling and down-sampling filters. This enables arbitrary symbol rate adjustments, realizing a continuously variable symbol rate transceiver. This approach effectively reduces the symbol rate, consequently decreasing bandwidth consumption and improving receiver sensitivity, thereby enhancing the reliability of satellite communications.
显示于类别:	[通訊工程研究所] 博碩士論文

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