使用 120-nm GaN HEMT 與 100-nm GaAs pHEMT 製程之 Q 頻段與 W 頻段低雜訊放大器;Q-Band and W-Band Low-Noise Ampliers in 120-nm GaN HEMT and 100-nm GaAs pHEMT Technologies

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Title:	使用 120-nm GaN HEMT 與 100-nm GaAs pHEMT 製程之 Q 頻段與 W 頻段低雜訊放大器;Q-Band and W-Band Low-Noise Ampliers in 120-nm GaN HEMT and 100-nm GaAs pHEMT Technologies
Authors:	羅紹平;Lo, Shao-Ping
Contributors:	電機工程學系
Keywords:	低雜訊放大器;Q 頻段;W 頻段;砷化鎵;氮化鎵;LNA;Q-band;W-band;GaAs;GaN
Date:	2025-08-27
Issue Date:	2025-10-17 12:58:37 (UTC+8)
Publisher:	國立中央大學
Abstract:	本論文為使用WIN 120-nm GaN HEMT 製程，設計應用於第五代行動通訊中毫米波頻段Q 頻段低雜訊放大器，以及使用 WIN 100-nm GaAs pHEMT 製程來實現的 Q 和 W 頻段低雜訊放大器。第一章緒論說明毫米波技術於 5G、衛星通訊與雷達系統中的應用潛力，特別針對 Q（33 50 GHz）與 W （75 110 GHz）頻段之重要性加以說明。在第二章中，我們使用 WIN 120-nm GaN HEMT 製程設計應用於 Q 頻段之二級與三級低雜訊放大器。二級電路的小訊號量測結果在 40 GHz 的操作頻率時，增益為 11.5 dB。雜訊量測在 37 至 50 GHz 的頻率範圍，量測結果與模擬結果趨勢相符， NF 在 40 GHz 下為 2.13 dB，大訊號量測結果 IP1dB 為 1 dBm，線性度模擬結果 IIP3 為 −1.9 dBm。此電路雜訊指數以及線性度表現不錯，增益則是偏低。三級電路的小訊號量測結果在 40 GHz 的操作頻率時，增益為 24.7 dB。 NF 在 40 GHz 下的模擬結果為 1.9 dB，大訊號量測結果 IP1dB 為 −10.2 dBm，線性度模擬結果 IIP3 為 −1.67 dBm。改善了二級電路增益不高的問題，且 NF 更進一步降低。未來改進方向可著重在頻寬的提升，匹配上避免過高的Q值。在第三章中，我們使用 WIN 100-nm GaAs pHEMT 製程並設計了 Q 頻段之二級低雜訊放大器。透過先前下線之經驗進行改善電路的設計流程和模擬方式。該電路採用了二級 Cascade 架構，第一級電路為 Cascode 架構、第二級電路為 CS 架構。小訊號量測結果在 40 GHz 的操作頻率時，gain 為 23.4 dB。雜訊量測在 37 至 50 GHz 的頻率範圍，NF 模擬在 40 GHz 下為 2.13 dB，大訊號量測結果 IP1dB 為 −13dBm。與其他文獻相比較，此電路在 Q 頻段下取得不錯的效能，在功耗控制良好的情況下獲得了令人滿意的 NF 、增益及線性度。在第四章中，我們使用 WIN 100-nm GaAs pHEMT 製程並設計了應用於 W 頻段之 Cascode 與二級低雜訊放大器。第一個電路採用了 Cascode 架構；另一個電路延續前一個 Cascode 電路在前級加上 CS 架構。Cascode 電路的小訊號量測結果在 94 GHz 的操作頻率時，gain 為 12.7 dB。雜訊量測在 88 至 102 GHz 的頻率範圍，量測結果與模擬結果趨勢相符，NF 在 94 GHz 下為 4.5 dB，大訊號量測結果 IP1dB 為 −11.2 dBm。二級電路的小訊號模擬結果在 94 GHz 的操作頻率時，增益為 23.9 dB。 NF 模擬在 94 GHz 下為 4.14 dB，大訊號模擬結果 IP1dB 為 −23.3 dBm，線性度模擬結果 IIP3 為 −13.5 dBm與其他文獻相比較，此電路在 W 頻段下取得不錯的效能，與其他製程相比在 gain 上具有優勢， NF 及功率消耗上效能尚可，無明顯短板。綜合以上，本論文展示 GaAs 及 GaN 製程於高頻 LNA 設計中的可行性與效能優勢，並針對多級電路結構、匹配網路、元件面積與耗能等限制進行優化，具體實現多款高效能低雜訊放大器。 ;This thesis presents the design of Q-band low-noise ampli ers (LNAs) using the WIN 120-nm GaN HEMT process for millimeter-wave applications in fth-generation (5G) mobile communications, as well as the implementation of Q- and W -band LNAs using the WIN 100-nm GaAs pHEMT process. Chapter 1 introduces the potential applications of millimeter-wave technology in 5G, satellite communications, and radar systems, with particular emphasis on the importance of the Q-band (33 50 GHz) and W -band (75 110 GHz). In Chapter 2, two- and three-stage LNAs for the Q-band are designed using the WIN 120-nm GaN HEMT process. The two-stage circuit achieves a small-signal gain of 11.5 dB at the operating frequency of 40 GHz. Noise measurements, performed from 37 to 50 GHz, are consistent with simulation results, showing a noise gure (NF) of 2.13 dB at 40 GHz. The large-signal measurement yields an IP1dB of 1 dBm, while the simulated linearity result gives an IIP3 of −1.9 dBm. This circuit demonstrates good noise and linearity performance but relatively low gain. The three-stage circuit achieves a small-signal gain of 24.7 dB at 40 GHz. The simulated NF is 1.9 dB at 40 GHz, with a measured IP1dB of −10.2 dBm and a simulated IIP3 of −1.67 dBm. This design improves upon the gain limitation of the two-stage circuit while further reducing NF. Future improvements may focus on bandwidth enhancement by avoiding excessively high-Q matching networks.In Chapter 3, a two-stage Q-band LNA is designed using the WIN 100-nm GaAs pHEMT process, with improvements in design ow and simulation methodology based on prior fabrication experience. The circuit adopts a two-stage cascade topology, where the rst stage is a cascode and the second stage is a common-source (CS) ampli er. The measured small-signal gain is 23.4 dB at 40 GHz. Noise measurements between 37 and 50 GHz align with simulations, yielding an NF of 2.13 dB at 40 GHz. The large-signal measurement shows an IP1dB of −13 dBm. Compared with other works, this circuit achieves competitive performance in the Q-band, demonstrating satisfactory NF, gain, and linearity under well-controlled power consumption. In Chapter 4, W -band LNAs are designed using the WIN 100-nm GaAs pHEMT process, including a cascode ampli er and a two-stage ampli er. The rst circuit adopts a cascode topology, while the second builds upon the cascode stage with an additional CS stage. The cascode circuit achieves a small-signal gain of 12.7 dB at 94 GHz. Noise measurements from 88 to 102 GHz are consistent with simulations, yielding an NF of 4.5 dB at 94 GHz. The measured IP1dB is −11.2 dBm. For the two-stage ampli er, simulations indicate a gain of 23.9 dB at 94 GHz, with an NF of 4.14 dB, IP1dB of −23.3 dBm, and IIP3 of −13.5 dBm. Compared with other reported works, this design demonstrates competitive performance in the W -band, o ering advantages in gain, acceptable NF, and moderate power consumption without signi cant drawbacks. In summary, this thesis demonstrates the feasibility and performance advantages of GaAs and GaN technologies for high-frequency LNA design. The proposed designs optimize multi-stage circuit topologies, matching networks, device area, and power consumption constraints, successfully realizing multiple high-performance LNAs.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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