本論文探討功率放大器之設計與性能分析，分別採用WIN120 nm GaN HEMT 與 WIN 100-nm GaAs pHEMT 製程，實現多種架 構，涵蓋Q 頻段與E 頻段應用。 第二章設計一組操作於Q 頻段（40GHz）之單級功率放大器， 使用WIN120-nm GaN HEMT 製程。初版電路因補償電感估算不準 導致頻率響應偏移，經偵錯與修正後重新下線。量測結果顯示，在40 GHz 下具備 5.1 dB 增益，OP1dB 為 21.7 dBm，於 P1dB 時的功率附 加效率（PAE）為10.8%。 第三章利用WIN100-nm GaAs pHEMT 製程，開發一組二級共 源級功率放大器。設計過程參考並改良先前電路之模擬與偵錯經驗。 量測結果顯示，在40GHz下增益為14.2 dB，OP1dB 為 24.4 dBm， 對應PAE為29.1%。 第四章延續相同製程，實現四級共源級功率放大器。由於第一級 電流量測時與模擬不符，因此調整模擬條件後進行比對。最終結果顯 示，在40GHz下增益約16.5dB；雖未進行大訊號量測，但模擬結果 顯示OP1dB 為 20.3 dBm，PAE 達 47.4%。 第五章則針對 E 頻段（80 GHz），採用 WIN 100-nm GaAs pHEMT 製程設計單級功率放大器。此設計在既有電路基礎上進一步 優化。量測結果顯示，在80GHz下增益約7dB；大訊號以模擬數據 為準，OP1dB 為 18.6 dBm，PAE 為 38.3%。;This thesis investigates the design and performance of power amplifiers implemented in WIN 120-nm GaN HEMT and WIN 100-nm GaAs pHEMT technologies, targeting both Q-band and E-band applications. In Chapter 2, a single-stage power amplifier operating at the Q band (40 GHz) is designed using the WIN 120-nm GaN HEMT process. The initial circuit suffered from frequency deviation due to inaccurate estimation of compensation inductors. After debugging and redesign, the measured results show a gain of 5.1 dB at 40 GHz, with an OP1dB of 21.7 dBm and a power-added efficiency (PAE) of 10.8% at P1dB. Chapter 3 presents a two-stage common-source power amplifier realized in the WIN 100-nm GaAs pHEMT process. The design was improved based on prior circuits and debugging experience. Measurement results demonstrate a gain of 14.2 dB at 40 GHz, an OP1dB of 24.4 dBm, and a PAE of 29.1%. In Chapter 4, a four-stage common-source power amplifier is implemented in the same GaAs process. Due to discrepancies between the measured and simulated current in the first stage, simulation conditions were adjusted for verification. The final results show a gain of approximately 16.5 dB at 40 GHz. Although large-signal measurements were not performed, simulations indicate an OP1dB of 20.3 dBm with a PAE of 47.4%. Chapter 5 focuses on an E-band (80 GHz) single-stage power amplifier, also implemented in the WIN 100-nm GaAs pHEMT process. This design builds upon and optimizes a prior circuit. Measurement results reveal a gain of about 7 dB at 80 GHz. Large-signal performance is estimated from simulation, yielding an OP1dB of 18.6 dBm and a PAE of 38.3%.
