電網失真不平衡下相位偵測標么化延遲信號消除鎖相迴路之研製;Development and Implementation of Normalized Phase Discriminator Delayed Signal Cancellation Phase-Locked Loop Under Distorted and Unbalanced Grid

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Title:	電網失真不平衡下相位偵測標么化延遲信號消除鎖相迴路之研製;Development and Implementation of Normalized Phase Discriminator Delayed Signal Cancellation Phase-Locked Loop Under Distorted and Unbalanced Grid
Authors:	張皓閔;Zhang, Hao-Min
Contributors:	電機工程學系
Keywords:	鎖相迴路;相位偵測;延遲訊號消除;標么化;Phase-Locked Loop;Phase Detection;Delayed Signal Cancellation;Normalization
Date:	2025-08-28
Issue Date:	2025-10-17 13:00:27 (UTC+8)
Publisher:	國立中央大學
Abstract:	本文著重於研發三相失真不平衡電網下鎖相迴路的控制，當電網存在諧波、不平衡或是相角跳變、頻率跳變、振幅驟降時，所提四倍角正弦標么化鎖相迴路(Quadruple Sine Phase-Locked Loop, Qsin-PLL)能成功鎖至正確相位。本文首先分析傳統鎖相迴路在失真不平衡電網中的影響，並提出改良方案，所提方法包括改良型三採樣點延遲訊號消除策略(Improved Three-Sample Filter, ITSF)，及四倍角正弦標么化策略，有效抑制電網諧波與不平衡導致的擾動。此外，本文引入可調整四倍角正弦標么化相位誤差函數(Quadruple Sine Phase Error Tuning Function,Qsin-PETF)，改善所提Qsin-PLL可能出現相位收斂錯誤的問題。最後由模擬與實作結果顯示，所提Qsin-PLL在電網失真與不平衡條件下，皆展現出較佳的鎖定速度與穩定性能，對於相角跳變、頻率跳變或是振幅驟降情境下，所提Qsin-PLL也能鎖至正確相位，證明所提方法在實際電網中應用的可行性。;This paper focuses on the development of a phase-locked loop (PLL) control method for three-phase distorted and unbalanced power grids. When the grid is affected by harmonics, unbalance, phase jumps, frequency variations, or amplitude sags, the proposed Quadruple Sine Phase-Locked Loop (Qsin-PLL) can accurately lock onto the correct phase. The study first analyzes the limitations of conventional PLLs under distorted and unbalanced grid conditions and then proposes an improved scheme. The proposed method integrates an improved three-sample delayed signal cancellation strategy and a quadruple sine normalization strategy to effectively suppress disturbances caused by harmonics and unbalance. In addition, a Quadruple Sine Phase Error Tuning Function (Qsin-PETF) is introduced, which employs an arctangent-based phase error interval detection to improve the regional stability of the system. Simulation and experimental results demonstrate that the proposed Qsin-PLL achieves faster locking speed and better stability under distorted and unbalanced conditions, and can accurately track the correct phase during phase jumps, frequency variations, or amplitude sags. Finally, hardware implementation verifies the feasibility of applying the proposed method to practical power grids.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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