應用於微波存取全球互通之發射機研製; The Design and Implementation of Transmitter for WiMAX Applications

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Title:	應用於微波存取全球互通之發射機研製;The Design and Implementation of Transmitter for WiMAX Applications
Authors:	陳冠宇;Kuan-Yu Chen
Contributors:	電機工程研究所
Keywords:	功率放大器;射頻電路;發射機;RF circuit;Transmitter;power amplifier
Date:	2006-06-22
Issue Date:	2009-09-22 12:01:39 (UTC+8)
Publisher:	國立中央大學圖書館
Abstract:	此篇論文描述了數個應用於微波存取全球互通系統之射頻電路設計，採用台積電0.35微米矽鍺雙載子互補金屬氧化半導體製程。以下依各章節不同的電路來分類，概述論文中各電路的實際量測結果。第二章為射頻發射機子電路的設計，包括了升頻混波器與可變增益放大器。升頻混波器約有9 dB的轉換損耗、輸出1-dB增益壓縮點為-11 dBm、輸出三階截斷點在-3 dBm、射頻埠和中頻埠和本地振盪源埠之間的隔離度均大於29 dB。可變增益放大器增益可調範圍為9.55 dB，高增益模式量測結果增益8.75 dB，輸出1-dB壓縮點為0.8 dBm，輸入三階截取點為16.8 dBm。線性模式增益4.1 dB，輸出1-dB壓縮點為10 dBm，輸入三階截取點為20 dBm。低增益模式量測結果增益-0.8 dB，輸出1-dB壓縮點為1.2 dBm，輸入三階截取點為12 dBm。第三章為功率放大器的設計，包括了兩個壓控振盪器，一個是差動式可適性功率放大器，另一個是三級可變增益功率放大器。第一個功率放大器具有7.1 dB的增益、大於15 dB的輸入回返損耗、大於13 dB的輸出回返損耗、20.3 dBm的輸出1-dB增益壓縮點、28.1 dBm的輸出三階截斷點，1-dB增益壓縮點的功率增進效率為23.6%。第二個功率放大器具有25.2 dB的增益、大於8.9 dB的輸入回返損耗、20.6 dBm的輸出1-dB增益壓縮點、26.5 dBm的輸出三階截斷點，1-dB增益壓縮點的功率增進效率為24.4%，增益可調範圍為11.4 dB。 This thesis describes several radio frequency circuit designs, which are adopted in WiMAX applications. They are implemented with TSMC 0.35?m SiGe BiCMOS process. The following sections will summarize the practical measured results which will be thoroughly presented in following chapters. Chapter 2 introduces the designs of sub-circuits of radio-frequency transmitter, including up-conversion mixer, and variable-gain amplifier. These circuits are measured on FR4 print circuit boards. The up-conversion mixer achieves conversion loss of 9 dB, output P1dB of -11 dBm, output IP3 of -3 dBm, and superior to 29 dB isolation among all ports. The variable gain amplifier (VGA) has gain control range of 9.55 dB, and has gain of 8.75 dB, output power at the 1-dB compression point of -0.8 dBm, output third order intercept point of 16.8 dBm in high-gain mode, and gain of 4.1 dB, output power at the 1-dB compression point of 10 dBm, output third-order intercept point of 20 dBm in linear mode, gain of -0.8 dB, output power at 1-dB compression point of 1.2 dBm, output third-order intercept point of 12 dBm in low-gain mode. Chapter 3 presents the designs of linear power amplifier, including a differential adaptive power amplifier, and a three-stage variable-gain power amplifier. These circuits are measured on FR4 print circuit boards. The former amplifier provides a 7.1 dB gain with input return loss better than 15 dB, output return loss is 13 dB and has output P1dB of 20.3 dBm, output IP3 of 28.1 dBm, the PAE@ P1dB of 23.6%. The latter amplifier provides a 25.2 dB gain with input return loss better than 8.9 dB, and has output P1dB of 20.6 dBm, output IP3 of 26.4, the PAE@ P1dB of 24.4%, and gain control range of 11.4 dB.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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