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姓名 黃緯浩(Wei-hao Huang) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 異質接面之模型建立及與其在二维半導體元件模擬之應用
(Heterojunction Modeling and its application in 2D HBT simulation.)相關論文 檔案 [Endnote RIS 格式]
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摘要(中) 在這篇論文中,我們使用等效電路法(equivalent circuit approach)來研究開發二維異質接面模型之建立。所謂等效電路法就是將半導體元件的柏松方程式、電子連續方程式以及電洞連續方程式轉換成等效電路。我們 先從1D pN 異質接面(hetero-junction)開始研究,建立1D pN異質接面等效電路模型,然後我們參考1D pN異質接面等效電路來建立2D 異質接面雙載子電晶體(HBT)等效電路模型。並且,我們也利用我們開發出來的模型從本質濃度的觀點來探討BJT與HBT的差異性。 摘要(英) In this thesis, we use the equivalent circuit approach to study 2D heterojunction modeling. Poisson’s equation and continuity equation for electron and hole are formulated into a sub-circuit format suitable for general circuit simulator in the equivalent circuit approach. We start to investigate in the one-dimensional pN hetero-junction and we built one-dimensional pN hetero-junction equivalent circuit model. Then, we refer one-dimensional pN hetero-junction equivalent circuit model to built two-dimensional HBT equivalent circuit model. Furthermore, we use the concept of intrinsic carrier concentration to discuss the difference of HBT and BJT. 關鍵字(中) ★ 異質接面之模型建立及與其在二维半導體元件模擬之應用 關鍵字(英) ★ Heterojunction Modeling
★ 2D HBT simulation.論文目次 1. Introduction
2. The Development of hetero-junction p-N diode in 1-D
model
2.1 1D Model review
2.2 Modeling the Boundary Condition of pN hetero-
junction Simulation
2.3 Modified pN 1-D model
2.4 The Hetero-junction Diode
2.5 Depletion width of pN diode
2.6 Diffusion current of pn and pN hetero-junction diode
2.7 Simulation of 1D pn diode and p-N heterojunction
diode I-V Character
3. The Development of HBT in 2-D model
3.1 2D Model review
3.2 The Heterojunction Bipolar Transistor structure
in 2D simulation
3.3 The simulation results in 2D HBT
4. Application in 2D HBT simulation
4.1 The recessed 2D HBT simulation
4.2 Amplification simulation with 2D HBT
5. Conclusion參考文獻 [1]C.-L. Teng, “An equivalent circuit approach to mixed-
level device and circuit Simulation,” Master Thesis,
Institute of EE, NCU, 2007.
[2]Huang-Lin Fang, “New Variables and Table Method for
Carrier Calculation in Semiconductor,” Master Thesis,
Institute of EE, NCU, 2007.
[3]Zhi-Hao Lin, “An Efficient Analytical Model for
Carrier Calculation Including Fermi-Dirac Integration
and Its Application to Device Simulation,” Master
Thesis, Institute of EE, NCU, 2004.
[4]Ho-Chieh Wu, “New Variables for AC Simulation of 1-D
Semiconductor Devices,” Master Thesis, Institute of
EE, NCU, 2007.
[5]Donald A. Neamen, Semiconductor Physics & Devices,
Ed. , McGraw-Hill, pp. 355~363, 1997.
[6]William Liu, Fundamentals of Ⅲ-Ⅴ Devices, HBTs,
MESFETs and HFETs/HEMTs, John Wiley & Sons, Inc, pp.
147~149, 1999.
[7]H. C. Casey, Jr. , Device for Integrated Circuits
Silicon and Ⅲ-Ⅴ Compound Semiconductors, John Wiley &
Sons, Inc, pp. 215~218, 1999.
[8]Sau-Fu Wang, “Comparison of One-dimensional and Two-
dimensional Simulation in Bipolar Transistors,” Master
Thesis, Institute of EE, NCU, 2000.
[9]Kyounghoon Yang, Jack R. East and George I. Haddad,
“Numerical Study on the Injection Performance of
AlGaAs/GaAs Abrupt Emitter Heterojunction Bipolar
Transistors,” IEEE Transactions on Electrons Device,
Vol. 41, No. 2, February 1994.
[10]Kiyoyuki Yokoyama, Masaaki Tomizawa and Akira Yoshii,
“Accurate Modeling of AlGaAs/GaAs Heterostructure
Bipolar Transistors by Two-Dimensional,” IEEE
Transactions on Electrons Device, Vol. Ed-3141, No. 9,
Septermber 1984.
[11]Zhi-Hao Lin, “An Efficient Analytical Model for
Carrier Calculation Including Fermi-Dirac Integration
and Its Application to Device Simulation,” Master
Thesis, Institute of EE, NCU, 2004.指導教授 蔡曜聰(Yao-Tsung Tsai) 審核日期 2008-7-1 推文 plurk
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