用軸線法求三角形內部向量及二維元件模擬

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姓名

黃梓維(Tzu-Wei Huang) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

用軸線法求三角形內部向量及二維元件模擬
(Finding internal vector from the axis method in arbitrary triangle element for 2-D semiconductor device simulation)

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摘要(中)

在本篇論文中，我們開發全新的三角型網格模組，並對於半導體元件進行模擬，為了能夠更加提升模擬的精確性以及模擬時的任意適用性，我們開發出了二維的重心版模組，並且使用軸線法對其進行計算該三角形模組的電場、電子流密度與電洞流密度。這之中也利用了理論電阻值來驗證模擬電阻值還有模擬PN二極體之特性曲線與物理特性比較，來加以佐證我們所開發出的模組之精確性，在最後再探討本篇所開發之模組在未來的應用。

摘要(英)

In this thesis, we have successfully developed a new triangle mesh model by using the axis method for simulating semiconductor devices. To increase the accuracy and the flexibility for the simulation, we developed the 2D barycenter module to calculate the electric field, diffusion current and drift current. Furthermore, the simulated resistance are compared to the theoretical value for verification. The axis method is also applied to the PN diode I-V characteristics. Finally we investigate the future applications for the module.

關鍵字(中)

★ 軸線法

關鍵字(英)

論文目次

摘要 ………………………………………………………………………………………………………………………………….. i
Abstract ……………………………………………………………………………………………………………………………… ii
致謝 ………………………………………………………………………………………………………………………………….. iii
目錄 ………………………………………………………………………………………………………………………………….. iv
圖目錄 ………………………………………………………………………………………………………………………………. v
表目錄 …………………………………………………………………………………………………………………………..... vii
簡介…………………………………………………………………………………………………………………..... 1
程式原理與架構介紹 ……………………………………………………………………………………..... 3
2.1 程式基本架構 …………………………………………………………………………………………......... 3
2.2 用邊線法求內部電場……………………………………………………………………………….......... 6
2.3 用軸線法求內部電場之模型開發 ……………………………………………………………..... 10
三角形網格於二維半導體之模擬與驗證 .…………………………………………………...... 19
3.1 內部電場驗證 …………………………………………………………………………………………....... 19
3.2 電子流與電洞流驗證 ..…………………………………………………………………………………. 21
3.3 簡單電阻模擬分析.………………………………………………………………………………………… 27
第四章 P-N二極體接面與 I-V 驗證…...…..…………………………………………………………….… 31
4.1 兩段式電壓掃描 …………………………………………………………………………………………… 32
4.2 IV結果驗證 ………………………………………………………………………………………….……… 34
4.3 BJT延伸討論 .……………………………………………………………………………………………… 36
第五章結論 ……………….………………………………………………………………………………………………… 40
參考文獻 ……………………….………………………………………………………………………………………………… 41

參考文獻

[1] D R. E. Bank and D. J. Rose, “Semiconductor device simulation,” IEEE Trans, Electron Devices vol. 30, no. 9, Sep. 1983.
[2] M. Bern, D. Eppstein, and J. Gilbert, “Provably good mesh generation,” J. Compute. System Sci., pp. 384–409, 1994
[3] S. Micheletti, “Stabilized finite elements for semiconductor device simulation,” Compute & Visual Sci., vol. 3, pp. 177-183, 2001.
[4] Z. Z. Lin, “Development of Obtuse triangle element and its applications to 2D Semiconductor device,” M. S. Thesis, Institute of EE, Nation Central University, Taiwan, Republic of China, pp. 10-13, 2015.
[5] H. Kaur, S. Kabra, S. Bindra, S. Haldar, and R. S. Gupta, “′Impact of Graded Channel (Gc) Design in Fully Depleted Cylindrical/Surrounding Gate Mosfet (Fd Cgt/Sgt) for Improved Short Channel Immunity and Hot Carrier Reliability”, Solid-State Electronics, Vol. 51, pp.398-404, 2007.
[6] J. H. Seo, Y. J. Yoon, S. Lee, J. H. Lee, S. Cho, and I. M. Kang, “Design and Analysis of Si-Based Arch-Shaped Gate-All-around (GaAs) Tunneling Field-Effect Transistor (Tfet)”, Current Applied Physics, Vol. 15, pp.208-212, 2015
[7] R. E. Bank, D. J. Rose, and W. Fichtner, “Numerical methods for semiconductor device,”IEEE Trans, Electron Devices, vol. 30, no. 9, Sep. 1983.
[8] M. B. Patil, “New discretization scheme for two-dimensional semiconductor device simulation on triangular grid,” IEEE Trans, Computer-Aided Design of Integrated Circuits and Systems, vol. 17, no. 11, pp. 1160-1165, Nov. 1998.
[9] H. J. Kai,“ Finding the internal vector from the plane equation in obtuse triangle element for 2D semiconductor device simulation” M. S. Thesis, Institute of EE, National Central University, Taiwan, Republic of China, pp. 7-10, 2016.
[10] W. T. Shen” Finding internal vector from the edge vector in obtuse triangle element for 2D semiconductor device simulation” M. S. Thesis, Institute of EE, National Central University, Taiwan, Republic of China, pp. 5-8, 2016.
[11] M. B. Patil, “New discretization scheme for two-dimensional semiconductor device simulation on triangular grid,” IEEE Trans, Computer-Aided Design of Integrated Circuits and Systems, vol. 17, no. 11, pp. 1160-1165, Nov. 1998.
[12] M. J. Zeng, “Development of Triangular element and its applications to arbitrary 2D Semiconductor device,” M. S. Thesis, Institute of EE, Nation Central University, Taiwan, Republic of China, pp. 15-17, 2014.
[13] Z. Gao and J. Wu, “A small stencil and extremum-preserving scheme for anisotropic diffusion problems on arbitrary 2D and 3D meshes,” Journal of Computational Physics., vol. 250, pp. 308-331, Oct. 2013.
[14] S.Micheletti, “Stabilized finite elements for semiconductor device simulation, computing and Visualization in Science, vol. 3, no. 4, pp. 177-183, Jan. 2001.
[15] S. Holset, A. Jungel, and P. Pietra, “A mixed finite element discretization of the energy transport model for semiconductors,” SIAM Journal on Scientific Computing., vol. 24, no. 6, pp. 2058-2075, 2003.
[16] Bank, Randolph E., Donald J. Rose, and Wolfgang Fichtner. " Numerical methods for semiconductor device simulation." SIAM Journal on Scientific and Statistical Computing 4.3, pp. 416-435. 1983
[17] Z. Gao and J. Wu, “A small stencil and extremum-preserving scheme for anisotropic diffusion problems on arbitrary 2D and 3D meshes,” Journal of Computational Physics., vol. 250, pp. 308-331, Oct. 2013.

指導教授

蔡曜聰

審核日期

2018-6-29

推文