參考文獻 |
[1] P.-Y. Chen, C.-C. Huang, C.-Y. Lien, and Y.-H. Tsai, "An efficient hardware implementation of HOG feature extraction for human detection," IEEE Transactions on Intelligent Transportation Systems, vol. 15, no. 2, pp. 656-662, 2014.
[2] D. G. Lowe, "Distinctive image features from scale-invariant keypoints," International journal of computer vision, vol. 60, no. 2, pp. 91-110, 2004.
[3] J. Yum, C.-H. Lee, J.-S. Kim, and H.-J. Lee, "A novel hardware architecture with reduced internal memory for real-time extraction of SIFT in an HD video," IEEE Transactions on Circuits and Systems for Video Technology, vol. 26, no. 10, pp. 1943-1954, 2016.
[4] H. Cheng, N. Zheng, and J. Qin, "Pedestrian detection using sparse Gabor filter and support vector machine," IEEE Proceedings. Intelligent Vehicles Symposium, 2005., pp. 583-587, 2005.
[5] M. Oren, C. Papageorgiou, P. Sinha, E. Osuna, and T. Poggio, "Pedestrian detection using wavelet templates," cvpr, vol. 97, pp. 193-199, 1997.
[6] T. Ojala, M. Pietikäinen, and T. Mäenpää, "Multiresolution gray-scale and rotation invariant texture classification with local binary patterns," IEEE Transactions on Pattern Analysis & Machine Intelligence, no. 7, pp. 971-987, 2002.
[7] D. Huang, C. Shan, M. Ardabilian, Y. Wang, and L. Chen, "Local binary patterns and its application to facial image analysis: a survey," IEEE Transactions on Systems, Man, and Cybernetics, Part C (Applications and Reviews), vol. 41, no. 6, pp. 765-781, 2011.
[8] M. B. López, A. Nieto, J. Boutellier, J. Hannuksela, and O. Silvén, "Evaluation of real-time LBP computing in multiple architectures," Journal of Real-Time Image Processing, vol. 13, no. 2, pp. 375-396, 2017.
[9] M.-C. Hu, K. S. Ng, P.-Y. Chen, Y.-J. Hsiao, and C.-H. Li, "Local binary pattern circuit generator with adjustable parameters for feature extraction," IEEE Transactions on Intelligent Transportation Systems, vol. 19, no. 8, pp. 2582-2591, 2018.
[10] M. Kraft and M. Fularz, "A Hardware Architecture for Calculating LBP-Based Image Region Descriptors," Proceedings of the 9th International Conference on Computer Recognition Systems CORES 2015, pp. 671-679, 2016.
[11] J. Hafner, H. S. Sawhney, W. Equitz, M. Flickner, and W. Niblack, "Efficient color histogram indexing for quadratic form distance functions," IEEE transactions on pattern analysis and machine intelligence, vol. 17, no. 7, pp. 729-736, 1995.
[12] M. A. Stricker and M. Orengo, "Similarity of color images," Storage and Retrieval for Image and Video Databases III, vol. 2420, pp. 381-393, 1995.
[13] J. R. Smith and S.-F. Chang, "Tools and techniques for color image retrieval," Storage and Retrieval for Still Image and Video Databases IV, vol. 2670, pp. 426-438, 1996.
[14] A. Mojsilovic, H. Hu, and E. Soljanin, "Extraction of perceptually important colors and similarity measurement for image matching, retrieval and analysis," IEEE Transactions on Image Processing, vol. 11, no. 11, pp. 1238-1248, 2002.
[15] M. Ponti, T. S. Nazaré, and G. S. Thumé, "Image quantization as a dimensionality reduction procedure in color and texture feature extraction," Neurocomputing, vol. 173, pp. 385-396, 2016.
[16] K. Elektroingenieur and S. S. Haykin, Neural networks and learning machines. Pearson Upper Saddle River, 2009.
[17] J. Faigl and G. A. Hollinger, "Autonomous data collection using a self-organizing map," IEEE transactions on neural networks and learning systems, vol. 29, no. 5, pp. 1703-1715, 2018.
[18] M. A. d. A. de Sousa and E. Del-Moral-Hernandez, "Comparison of three FPGA architectures for embedded multidimensional categorization through Kohonen′s Self-organizing maps," 2017 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-4, 2017.
[19] C.-H. Chang, P. Xu, R. Xiao, and T. Srikanthan, "New adaptive color quantization method based on self-organizing maps," IEEE transactions on neural networks, vol. 16, no. 1, pp. 237-249, 2005.
[20] M. Abadi, S. Jovanovic, K. B. Khalifa, S. Weber, and M. H. Bedoui, "A hardware configurable self-organizing map for real-time color quantization," 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 336-339, 2016.
[21] Z. Huang et al., "A hardware-efficient vector quantizer based on self-organizing map for high-speed image compression," Applied Sciences, vol. 7, no. 11, p. 1106, 2017.
[22] M. Abadi, S. Jovanovic, K. B. Khalifa, S. Weber, and M. H. Bedoui, "A scalable and adaptable hardware NoC-based self organizing map," Microprocessors and Microsystems, vol. 57, pp. 1-14, 2018.
[23] O. Mujahid, Z. Ullah, H. Mahmood, and A. Hafeez, "Fast Pattern Recognition Through an LBP Driven CAM on FPGA," IEEE Access, vol. 6, pp. 39525-39531, 2018.
[24] J. Lachmair, T. Mieth, R. Griessl, J. Hagemeyer, and M. Porrmann, "From CPU to FPGA—Acceleration of self-organizing maps for data mining," 2017 International Joint Conference on Neural Networks (IJCNN), pp. 4299-4308, 2017.
[25] C.-H. Chen, M.-Y. Lin, and X.-C. Guo, "High-level modeling and synthesis of smart sensor networks for Industrial Internet of Things," Computers & Electrical Engineering, vol. 61, pp. 48-66, 2017.
[26] E. Aptoula and S. Lefèvre, "Morphological description of color images for content-based image retrieval," IEEE Transactions on Image Processing, vol. 18, no. 11, pp. 2505-2517, 2009.
[27] T. Ojala, M. Pietikainen, and D. Harwood, "Performance evaluation of texture measures with classification based on Kullback discrimination of distributions," Proceedings of 12th International Conference on Pattern Recognition, vol. 1, pp. 582-585, 1994.
[28] O. Lahdenoja, M. Laiho, and A. Paasio, "Reducing the feature vector length in local binary pattern based face recognition," IEEE International Conference on Image Processing 2005, vol. 2, pp. II-914, 2005.
[29] W. Ge, W. Quan, and C. Han, "Face description and identification using histogram sequence of local binary pattern," 2015 Seventh International Conference on Advanced Computational Intelligence (ICACI), pp. 415-420, 2015.
[30] N.-J. Wang, S.-C. Chang, and P.-J. Chou, "A real-time multi-face detection system implemented on FPGA," 2012 International Symposium on Intelligent Signal Processing and Communications Systems, pp. 333-337, 2012.
[31] J. Boutellier, I. Lundbom, J. Janhunen, J. Ylimäinen, and J. Hannuksela, "Application-specific instruction processor for extracting local binary patterns," Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, pp. 1-8, 2012.
[32] J. Janhunen, P. Salmela, O. Silvén, and M. Juntti, "Fixed-versus floating-point implementation of MIMO-OFDM detector," 2011 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. 3276-3279, 2011.
[33] M. G. Elfeky, W. G. Aref, and A. K. Elmagarmid, "WARP: time warping for periodicity detection," Fifth IEEE International Conference on Data Mining (ICDM′05), p. 8 pp., 2005.
[34] L. Platon, F. Zehraoui, and F. Tahi, "Self-organizing maps with supervised layer," 2017 12th International Workshop on Self-Organizing Maps and Learning Vector Quantization, Clustering and Data Visualization (WSOM), pp. 1-8, 2017.
[35] H. Hikawa and Y. Maeda, "Improved learning performance of hardware self-organizing map using a novel neighborhood function," IEEE transactions on neural networks and learning systems, vol. 26, no. 11, pp. 2861-2873, 2015.
[36] D. C. Hendry, A. A. Duncan, and N. Lightowler, "IP core implementation of a self-organizing neural network," IEEE Transactions on Neural Networks, vol. 14, no. 5, pp. 1085-1096, 2003.
[37] M. Melton, T. Phan, D. S. Reeves, and D. E. Van den Bout, "The TInMANN VLSI Chip," IEEE Transactions on neural networks, vol. 3, no. 3, pp. 375-384, 1992.
[38] T. Hämäläinen, J. Saarinen, and K. Kaski, "TUTNC: A general purpose parallel computer for neural network computations," Microprocessors and Microsystems, vol. 19, no. 8, pp. 447-465, 1995.
[39] L. Vojáček, "Neural Networks in High Performance Computing Environment," 2015.
[40] P. Kolinummi, P. Hämäläinen, T. Hämäläinen, and J. Saarinen, "PARNEU: general-purpose partial tree computer," Microprocessors and microsystems, vol. 24, no. 1, pp. 23-42, 2000.
[41] Y. Bai, S. Z. Ahmed, and B. Granado, "ARC 2014: Towards a Fast FPGA Implementation of a Heap-Based Priority Queue for Image Coding Using a Parallel Index-Aware Tree," ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 9, no. 1, p. 8, 2015.
[42] R. J. Mayer, "IDEF0 function modeling," A Reconstruction of the Original Air Force Wright Aeronautical Laboratory Technical Report, AFWAL-TR-81-4023 (The IDEF0 Yellow Book), Knowledge-Based System Inc, College Station, TX, 1992. |