博碩士論文 111522162 詳細資訊




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姓名 蕭如珊(Ju-Shan Hsiao)  查詢紙本館藏   畢業系所 資訊工程學系
論文名稱 ReActNet-XGBoost 硬體加速器設計與實現——資源受限場景的應用探索
(ReActNet-XGBoost Hardware Accelerator: Design, Implementation, and Application Exploration in Resource-Constrained Scenarios)
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檔案 [Endnote RIS 格式]    [Bibtex 格式]    [相關文章]   [文章引用]   [完整記錄]   [館藏目錄]   至系統瀏覽論文 (2030-1-21以後開放)
摘要(中) 隨著工業 4.0 和邊緣運算技術的快速發展,智慧醫療與工業監控等場景對
即時資料處理和智慧化分析提出了高效能、低功耗與資源優化的嚴苛需求。然而,傳統卷積神經網路 (CNN) 因其高運算量與記憶體需求,難以滿足資源受限邊緣裝置的應用場景。為解決此一挑戰,本研究提出了一種結合 ReActNet 架構與 XGBoost 分類器的硬體加速器,專注於一維時間序列資料的處理。
本設計以 1D CNN 的輕量化特性為基礎,通過二值卷積技術顯著降低運算
負擔,嘗試取得低功耗與高準確度之間的平衡,並且為智慧醫療中的生理 訊號監測以及工業監控中的設備異常檢測提供了創新的解決方案,展現出應用於資源受限邊緣裝置的潛力。
摘要(英) With the rapid advancement of Industry 4.0 and edge computing technologies, applications in smart healthcare and industrial monitoring demand highly efficient, low-power, and resource-optimized solutions for real-time data processing and intelligent analysis. However, traditional convolutional neural networks (CNNs), with their significant computational and memory requirements, struggle to meet the constraints of resource-limited edge devices. Addressing these challenges, this study introduces a hardware accelerator combining the ReActNet architecture with an XGBoost classifier, specifically designed for processing one-dimensional time-series data.
Built upon the lightweight characteristics of 1D CNNs, the proposed design leverages binary convolution techniques to significantly reduce computational overhead, aiming to achieve an optimal balance between low power consumption and high accuracy. This innovative approach offers promising solutions for real-time physiological signal monitoring in smart healthcare and anomaly detection in industrial monitoring, demonstrating substantial potential for deployment in resource-constrained edge devices.
關鍵字(中) ★ 二值卷積神經網路
★ 硬體加速器
★ 邊緣裝置
★ 資源受限應用
關鍵字(英) ★ Binary Convolutional Neural Network
★ Hardware Accelerator
★ Edge Devices
★ Resource-Constrained Applications
論文目次 摘要 i
Abstract ii
致謝 iii
目錄 v
圖目錄 viii
表目錄 x
第一章、緒論 1
1.1 研究背景 1
1.2 研究目標 3
1.3 論文架構 4
第二章、技術回顧 6
2.1 二值卷積神經網路 6
2.1.1 Binarized Neural Network 6
2.1.2 XNOR-Net 8
2.1.3 ReActNet 11
2.2 XGBoost 15
2.2.1 多決策樹硬體加速器 18
2.3 MIAT 系統設計方法論 21
2.3.1 IDEF0 階層式模組化設計 22
2.3.2 GRAFCET 離散事件建模 24
2.3.3 硬體高階合成 27
第三章、ReActNet-XGBoost 硬體加速器系統設計 30
3.1 系統架構 30
3.1.1 IDEF0 階層式模組化設計 31
3.1.2 GRAFCET 離散事件建模 32
3.2 ReActNet 特徵提取硬體模組 33
3.2.1 IDEF0 階層式模組化設計 34
3.2.2 GRAFCET 離散事件建模 34
3.3 XGBoost 分類器硬體模組 41
3.3.1 XGBoost 硬體化工具 41
3.3.2 IDEF0 階層式模組化設計 47
3.3.3 GRAFCET 離散事件建模 49
第四章、實驗結果 54
4.1 實驗軟硬體開發環境 54
4.2 實驗說明 55
4.2.1 實驗資料集 56
4.2.2 實驗細節補充說明 57
4.3 ModelSim 波形模擬驗證 57
第五章、結論與未來展望 60
5.1 結論 60
5.2 未來展望 60
參考文獻 62
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指導教授 陳慶瀚(Ching-Han Chen) 審核日期 2025-1-21
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