深次微米金氧半電晶體之高頻元件分析與其在高頻電路上應用

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陳怡伶(Yi-Ling Chen) 查詢紙本館藏

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電機工程學系

論文名稱

深次微米金氧半電晶體之高頻元件分析與其在高頻電路上應用
(The Characteristics of Sub-micro CMOS technology and Analysis Application in RFIC Design)

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摘要(中)

本論文以矽半導體製程，所製作之高頻金氧半電晶體為主軸，藉由與矽晶圓廠之計畫合作案，來了解次微米元件特性，並學習設計射頻電路。
首先於第二章裡，針對0.13μm製程之P型金氧半電晶體，利用高頻量測系統測試元件，並藉由所量得之資料，加以探討元件於50 MHz~20.05 GHz之高頻特色，並試著建立其高頻元件模型，並針對元件之高頻與功率特性，討論其最佳之佈局。
在第三章中，相同藉由量測0.13μm P型金氧半電晶體元件，於高頻與低頻下之雜訊表現，並比較N型與P型金氧半電晶體之低頻雜訊。相同地，亦針對元件之雜訊特性，討論其最佳之佈局。
第四章裡，利用0.18μm之1P6M製程，試著設計915 MHz之被動式射頻辨識系統。

摘要(英)

With the technology of Si-base device scaling down, CMOS had the better high frequency performance to design the consumption wireless products.
Thus, this thesis is a study with the sub-micron CMOS technology. It had understood the high frequency characteristic by cooperating with the project of the silicon foundry, and learned the radio frequency circuit design.
In chapter 2 and 3, it will be to discuss the high frequency, power performance and noise characteristic of 0.13μm CMOS high frequency devices. Then, t the optimum layout structure for theses performances will be considered and defined.
A passive UHF RFID system was described in chapter 4. Some frond-end circuits of the reader terminal will be tried to realize by using 0.18μm 1P6M CMOS process.

關鍵字(中)

★ 高頻元件
★ 次微米電晶體

關鍵字(英)

★ sub-micro MOSFET
★ high frequency device

論文目次

摘要（中文） III
摘要（英文） IV
目錄 V
圖目錄 VII
表目錄 X
第一章導論 1
§ 1.1 動機 1
§ 1.2 論文架構 3
第二章 0.13μm p-MOSFET元件模型 4
§ 2.1 簡介 4
§ 2.2 PMOS RF模型之建立 5
§ 2.3 大信號模型之驗證 15
§ 2.4 變溫下的PMOS模型 17
§ 2.5 最佳元件佈局探討 24
第三章 0.13μm CMOS元件雜訊之分析 28
§ 3.1 簡介 28
§ 3.2 MOSFET雜訊 29
§ 3.3 閃爍雜訊（Flicker Noise） 30
§ 3.3.1 MOSFET的閃爍雜訊特性 31
§ 3.3.2 量測結果與其分析 39
§ 3.4 高頻雜訊（High Frequency Noise） 45
§ 3.4.1 MOSFET的高頻雜訊特性 45
§ 3.4.2 量測結果及其分析 47
§ 3.5 最佳元件佈局探討 49
第四章射頻辨識系統 52
§ 4.1 簡介 52
§ 4.2 RFID系統架構 54
§ 4.3 發射端之功率放大器設計 58
§ 4.4 接收端之低雜訊放大器設計 63
第五章結論 71
參考文獻 73

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指導教授

詹益仁(Yi-Jen Chan)

審核日期

2005-6-28

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